Semiconductor memory
Manufacturing processes for phase change memory have suffered from the problem of chalcogenide material being susceptible to delamination, since this material exhibits low adhesion to high melting point metals and silicon oxide films. Furthermore, chalcogenide material has low thermal stability and hence tends to sublime during the manufacturing process of phase change memory. According to the present invention, conductive or insulative adhesive layers are formed over and under the chalcogenide material layer to enhance its delamination strength. Further, a protective film made up of a nitride film is formed on the sidewalls of the chalcogenide material layer to prevent sublimation of the chalcogenide material layer.
1 . A semiconductor memory device comprising:
a semiconductor substrate;
a select transistor formed on a principal surface of said semiconductor substrate;
an interlayer insulating film provided on said select transistor;
a plug provided so as to penetrate through said interlayer insulating film, said plug being electrically connected to said select transistor;
a phase change material layer provided on said interlayer insulating film such that a portion of said phase change material layer is connected with said plug;
an upper electrode provided on said phase change material layer; and
an adhesive layer provided between an under surface of said phase change material layer and a top surface of said interlayer insulating film and between said under surface of said phase change material layer and a top of said plug.
2 . The semiconductor memory device as claimed in claim 1 , wherein said adhesive layer is conductive.
3 . The semiconductor memory device as claimed in claim 1 , wherein said adhesive layer is formed on the entire portion of said under surface of said phase change material layer to a thickness of 5 nm or less.
4 . The semiconductor memory device as claimed in claim 2 , wherein said adhesive layer is formed on the entire portion of said under surface of said phase change material layer to a thickness of 5 nm or less.
5 . The semiconductor memory device as claimed in claim 1 , wherein said adhesive layer is a discontinuous film formed on a portion of said under surface of said phase change material layer to a thickness of 2 nm or less.
6 . The semiconductor memory device as claimed in claim 2 , wherein said adhesive layer is a discontinuous film formed on a portion of said under surface of said phase change material layer to a thickness of 2 nm or less.
7 . A semiconductor memory device comprising:
a semiconductor substrate;
a select transistor formed on a principal surface of said semiconductor substrate;
an interlayer insulating film provided on said select transistor;
a plug provided so as to penetrate through said interlayer insulating film, said plug being electrically connected to said select transistor;
a phase change material layer provided on said interlayer insulating film such that a portion of said phase change material layer is connected with said plug;
an upper electrode provided on said phase change material layer; and
an insulative adhesive layer provided between an under surface of said phase change material layer and a top surface of said interlayer insulating film.
8 . The semiconductor memory device as claimed in claim 7 , wherein said adhesive layer is made up of one or more types of films selected from the group consisting of Ti oxide, Al oxide, Ta oxide, Nb oxide, V oxide, Cr oxide, W oxide, Zr oxide, Hf oxide, and Si nitride films.
9 . A semiconductor memory device comprising:
a semiconductor substrate;
a select transistor formed on a principal surface of said semiconductor substrate;
an interlayer insulating film provided on said select transistor;
a plug provided so as to penetrate through said interlayer insulating film, said plug being electrically connected to said select transistor;
a phase change material layer provided on said interlayer insulating film such that a portion of said phase change material layer is connected with said plug;
an upper electrode provided on said phase change material layer; and
a conductive adhesive layer provided between an under surface of said phase change material layer and a top surface of said plug.
10 . A semiconductor memory device comprising:
a semiconductor substrate;
a select transistor formed on a principal surface of said semiconductor substrate;
an interlayer insulating film provided on said select transistor;
a plug provided so as to penetrate through said interlayer insulating film, said plug being electrically connected to said select transistor;
a phase change material layer provided on said interlayer insulating film such that a portion of said phase change material layer is connected with said plug;
an upper electrode provided on said phase change material layer;
an insulative adhesive layer formed between an under surface of said phase change material layer and a top surface of said inter layer insulating film; and
a conductive adhesive layer provided between said under surface of said phase change material layer and a top surface of said plug.
11 . The semiconductor memory device as claimed in claim 10 , wherein said insulative adhesive layer and said conductive adhesive layer contain one or more elements in common.
12 . The semiconductor memory device as claimed in claim 11 , wherein said one or more common elements have a lower free energy of oxide formation than silicon.
13 . The semiconductor memory device as claimed in claim 11 , wherein said one or more common elements are one or more types of elements selected from the group consisting of Ti, Zr, Hf, and Al.
14 . The semiconductor memory device as claimed in claim 12 , wherein said one or more common elements are one or more types of elements selected from the group consisting of Ti, Zr, Hf, and Al.
15 - 23 . (canceled)