IP Library Granted Patent US 7,830,950
Granted Patent B2
US 7,830,950 · App. 11/600,592 · Granted Nov 9, 2010

Processing a sequence of samples of a signal using downsampling

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Quick Facts
Patent No.
US 7,830,950
App. No.
11/600,592
Granted
Nov 9, 2010
Kind
B2
Abstract

For processing a sequence of samples of a signal, it is assumed that the signal comprises a carrier that is modulated by a code composed of a sequence of chips. A method of wiping-off an influence by the carrier on the sequence of samples and downsampling the sequence of samples (step 105 ; step 205 ; step 301 ) is shown, as well as utilizing the downsampled sequence of samples as a new sequence of samples for further processing (step 108 ; step 209 ; step 302 ). Also shown are a corresponding processing component 72 , a corresponding electronic device 71 , a corresponding system, a corresponding software program code and a corresponding software program product.

Claims (50)

1. A method for processing a sequence of samples of a signal, said signal comprises a carrier that is modulated by a code composed of a sequence of chips, said method comprising at a receiver:

a) wiping-off, by said receiver, an influence by said carrier on said sequence of samples and downsampling said sequence of samples, said wiping-off and downsampling comprising combining respective subsequent samples of a predetermined number of said sequence of samples and exploiting regularities in said sequence of samples in said combining, to obtain a sequence of combined values as a downsampled sequence of samples; and

b) utilizing said downsampled sequence of samples as a new sequence of samples for further processing.

2. The method according to claim 1 , wherein a respective combined value lies within a predetermined range or outside of a predetermined range, said method further comprising the following step preceding step b):

in case a combined value lies within said predetermined range, shifting said sequence of samples by one sample and combining respective subsequent samples of a predetermined number of said shifted sequence of samples to obtain a sequence of combined values.

3. The method according to claim 1 , further comprising shifting said sequence of samples by one sample and combining respective subsequent samples of a predetermined number of said shifted sequence of samples to obtain a further sequence of combined values, wherein b) comprises utilizing said sequence of combined values and said further sequence of combined values as a respective new sequence of samples for further processing in which an influence by said carrier has been wiped-off, and combining said processed sequence of combined values and said processed further sequence of combined values to a single sequence of values.

4. The method according to claim 1 , wherein said combining respective subsequent samples comprises combining respective two subsequent samples.

5. The method according to claim 1 , wherein said carrier is a binary offset carrier and wherein said code is a pseudo-random noise code.

6. The method according to claim 5 , wherein said binary offset carrier is a BOC(n,n), with n being a natural number, wherein said sampling rate is four samples per chip of said pseudo-random noise code, said sequence of samples being denoted by X={x 1 , x 2 , x 3 , x 4 , x 5 , x 6 , . . . }, and wherein said combining is performed by applying the following equation on said sequence of samples:

Y={[y 1 , y 2 ], . . . [y 2n+1 , y 2n+2 ], . . . }

where,

y 2n+1 =( x 4n+1 +x 4n+2 )/2 ( n= 0, 1, 2, 3, . . . )

y 2n+2 =−( x 4n+3 +x 4n+4 )/2

Y being said sequence of combined values.

7. The method according to claim 5 , wherein said binary offset carrier is a BOC(2n,n), with n being a natural number, wherein said sampling rate is four samples per chip of said pseudo-random noise code, said sequence of samples being denoted by X={x 1 , x 2 , x 3 , x 4 , x 5 , x 6 , . . . }, and wherein said combining is performed by applying the following equation on said sequence of samples:

Y={y 1 , y 2 , y 3 , . . . }

where,

y n =( x 2n+1 −x 2n+2 )/2 ( n= 0, 1, 2, 3, . . . )

Y being said sequence of combined values.

8. An apparatus for processing a sequence of samples of a signal, said signal comprises a carrier that is modulated by a code composed of a sequence of chips, said apparatus comprising, implemented at least partly in hardware:

a carrier wipe-off and downsampling portion configured to wipe-off an influence by said carrier on said sequence of samples and to downsample said sequence of samples, wherein said carrier wipe-off and downsampling portion is configured to combine respective subsequent samples of a predetermined number of said sequence of samples and to exploit regularities in said sequence of samples in said combining, to obtain a sequence of combined values as a downsampled sequence of samples; and

a processing component configured to utilize a downsampled sequence of samples provided by said carrier wipe-off and downsampling portion as a new sequence of samples for further processing.

9. System comprising an apparatus according to claim 8 .

10. The apparatus according to claim 8 , further comprising an analog-to-digital converter configured to obtain said samples of said signal with a sampling rate, which is at least equal to a frequency of said carrier and at least twice a chiprate of said code.

11. The apparatus according to claim 8 , wherein a respective combined value lies within a predetermined range or outside of a predetermined range, and wherein said carrier wipe-off and downsampling portion is configured to shift said sequence of samples by one sample and combining respective subsequent samples of a predetermined number of said shifted sequence of samples to obtain a sequence of combined values, in case a combined value lies within said predetermined range.

12. The apparatus according to claim 11 , wherein said predetermined range comprises only a single value of zero.

13. The apparatus according to claim 8 , wherein said carrier wipe-off and downsampling portion is configured to shift said sequence of samples by one sample and to combine respective subsequent samples of a predetermined number of said shifted sequence of samples to obtain a further sequence of Combined values, and wherein said processing component is configured to utilize said sequence of combined values and said further sequence of combined values as a respective new sequence of samples for further processing in which an influence by said carrier has been wiped-off, and to combine said processed sequence of combined values and said processed further sequence of combined values to a single sequence of values.

14. The apparatus according to claim 8 , wherein said carrier is a binary offset carrier and wherein said code is a pseudo-random noise code.

15. The apparatus according to claim 14 , wherein said binary offset carrier is a BOC(n,n), with n being a natural number, wherein said sampling rate is four samples per chip of said pseudo-random noise code, said sequence of samples being denoted by X={x 1 , x 2 , x 3 , x 4 , x 5 , x 6 , . . . }, and wherein said carrier wipe-off and downsampling portion is configured to perform said combining by applying the following equation on said sequence of samples:

Y={[y 2 ], . . . [y 2n+1 , y 2n+2 ], . . . }

where,

y 2n+1 =( x 4n+1 +x 4n+2 )/2 ( n= 0, 1, 2, 3, . . . )

y 2n+2 =−( x 4n+3 +x 4n+4 )/2

Y being said sequence of combined values.

16. Apparatus according to claim 14 , wherein said binary offset carrier is a BOC(2n,n), with n being a natural number, wherein said sampling rate is four samples per chip of said pseudo-random noise code, said sequence of samples being denoted by X={x 1 , x 2 , x 3 , x 4 , x 5 , x 6 , . . . }, and wherein said carrier wipe-off and downsampling portion is configured to perform said combining by applying the following equation on said sequence of samples:

Y={y 1 , y 2 , y 3 , y 4 , y 5 , y 6 , . . . }

where,

y n =( x 2n+1 −x 2n+2 )/2 ( n= 0, 1, 2, 3, . . . )

Y being said sequence of combined values.

17. The apparatus according to claim 8 , wherein said processing component is configured to perform a further processing which comprises a decoding, using at least one of a matched filter and a correlator.

18. The apparatus according to claim 8 , wherein said signal originates from a Global Navigation Satellite Systems signal, which is modulated with said modulated carrier.

19. The apparatus according to claim 8 , wherein said apparatus is one of:

a module for an electronic device;

an electronic device;

a satellite signal receiver;

a GALILEO receiver; and

a mobile station.

20. A non-transitory computer readable medium embedded with a software program code for processing a sequence of samples of a signal, said signal comprises a carrier that is modulated by a code composed of a sequence of chips, said software program code being configured realize the following when being executed by a processing unit:

a) wiping-off an influence by said carrier on said sequence of samples and downsampling said sequence of samples, said wiping-off and downsampling comprising combining respective subsequent samples of a predetermined number of said sequence of samples and exploiting regularities in said sequence of samples in said combining, to obtain a sequence of combined values as a downsampled sequence of samples; and

b) utilizing said downsampled sequence of samples as a new sequence of samples for further processing.

Assignments (4)
RELEASE OF SECURITY INTEREST Recorded Mar 30, 2021
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AMENDED AND RESTATED U.S. PATENT SECURITY AGREEMENT (FOR NON-U.S. GRANTORS) Recorded Aug 22, 2018
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UCC FINANCING STATEMENT AMENDMENT - DELETION OF SECURED PARTY Recorded Aug 30, 2016
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