High voltage integration circuit with freewheeling diode embedded in transistor
View Patent ↗A high voltage integrated circuit contains a freewheeling diode embedded in a transistor. It further includes a control block controlling a high voltage transistor and a power block—including the high voltage transistor—isolated from the control block by a device isolation region. The high voltage transistor includes a semiconductor substrate of a first conductivity type, a epitaxial layer of a second conductivity type on the semiconductor substrate, a buried layer of the second conductivity type between the semiconductor substrate and the epitaxial layer, a collector region of the second conductivity type on the buried layer, a base region of the first conductivity type on the epitaxial layer, and an emitter region of the second conductivity type formed in the base region. The power block further includes a deep impurity region of the first conductivity type near the collector region to form a PN junction.
1. A high voltage integrated circuit comprising:
a control block; and
a power block configured to be isolated from the control block by a device isolation region and to comprise a high voltage transistor formed therein,
the high voltage transistor comprising:
a semiconductor substrate;
a well of a first conductivity type formed in the semiconductor substrate;
source and drain regions of a second conductivity type directly formed in the well to be spaced apart from each other; and
a gate formed on the semiconductor substrate between the source and drain regions;
wherein the power block further comprises a deep impurity region of the first conductivity type separated from the source and drain regions and disposed near to one of the source and drain regions in the well to form a PN junction with the one of the source and drain regions and is commonly electrically connected to the other one of the source and drain regions.
2. The high voltage integrated circuit of claim 1 , wherein the deep impurity region has a double junction structure of a shallow junction region and a deep junction region, the shallow junction region having a predetermined junction depth, the deep junction region having a greater junction depth than said one of the source and drain regions.
3. The high voltage integrated circuit of claim 1 , wherein the deep impurity region has a single junction structure having a greater junction depth than said one of the source and drain regions.
4. The high voltage integrated circuit of claim 1 , further comprising a guard ring of the second conductivity type arranged in the device isolation region, the guard ring having the same junction depth as said one of the source and drain regions.
5. The high voltage integrated circuit of claim 4 , wherein a distance between the guard ring and the control block is about 100 μm.
6. A high voltage integrated circuit comprising:
a control block controlling a high voltage transistor; and
a power block configured to be isolated from the control block by a device isolation region and to comprise the high voltage transistor formed therein,
the high voltage transistor comprising:
a semiconductor substrate of a first conductivity type;
a well of a second conductivity type formed in the semiconductor substrate;
source and drain regions of the second conductivity type formed in the well to be spaced apart from each other, at least one of the source and drain regions formed directly in the well;
a body region of the first conductivity type completely surrounding one of the source and drain regions; and
a gate formed on the semiconductor substrate between the source and drain regions, configured to be partially overlapped with the body region;
wherein the power block further comprises a deep impurity region of the first conductivity type separated from the source and drain regions and disposed near to the other one of the source and drain regions in the well to form a PN junction with the other one of the source and drain regions and is commonly electrically connected to the other one of the source and drain regions.
7. The high voltage integrated circuit of claim 6 , wherein the deep impurity region has a double junction structure of a shallow junction region and a deep junction region, the shallow junction region having a predetermined junction depth, the deep junction region having a greater junction depth than the other one of the source and drain regions.
8. The high voltage integrated circuit of claim 6 , wherein the deep impurity region has a single junction structure having a greater junction depth than the other one of the source and drain regions.
9. The high voltage integrated circuit of claim 6 , further comprising a guard ring of the second conductivity type arranged in the device isolation region, the guard ring having the same junction depth as the one of the source and drain regions.
10. The high voltage integrated circuit of claim 9 , wherein a distance between the guard ring and the control block is about 100 μm.