Display panel and method of forming thereof
View Patent ↗A panel a gate line on a first substrate, a gate insulating layer covering the gate line, a semiconductor layer on the gate insulating layer, a data line intersecting the gate line and including a source electrode and a drain electrode facing the source electrode on the semiconductor layer, a connection assistant separated from the data line, a passivation layer covering the semiconductor layer and including contact holes exposing the connection assistant and a pixel electrode including a plurality of sub-pixel electrodes and formed on the passivation layer. The sub-pixel electrodes are connected to the connection assistant through the contact holes, are electrically connected to each other through the connection assistant and at least one of the sub-pixel electrodes is electrically connected to the drain electrode.
1. A panel, comprising:
a first substrate;
a gate line formed on the first substrate;
a gate insulating layer covering the gate line;
a semiconductor layer formed on the gate insulating layer;
a data line intersecting the gate line and including a source electrode formed on the semiconductor layer;
a drain electrode formed on the semiconductor layer and facing the source electrode;
a connection assistant separated from the data line;
a passivation layer covering the semiconductor layer and including contact holes exposing the connection assistant; and
a pixel electrode including a plurality of sub-pixel electrodes and formed on the passivation layer, wherein the sub-pixel electrodes of one pixel are respectively connected to the connection assistant through the contact holes, and
wherein the sub-pixel electrodes of the one pixel are electrically connected to each other through the connection assistant and at least one of the sub-pixel electrodes is electrically connected to the drain electrode.
2. The panel of claim 1 , wherein the sub-pixel electrodes include a transmission electrode.
3. The panel of claim 1 , wherein at least one of the sub-pixel electrodes includes a reflection electrode.
4. The panel of claim 1 , wherein the sub-pixel electrodes have a substantially rectangular shape with rounded corners.
5. The panel of claim 1 , further comprising:
a second substrate facing the first substrate; and
a common electrode formed on the second substrate and including a plurality of cutouts respectively formed substantially on the center of the sub-pixel electrodes.
6. The panel of claim 1 , wherein the cutouts have a circular shape.
7. The panel of claim 1 , wherein the connection assistant is formed on same layer of the panel as the data line.
8. A method of forming a display panel, the method comprising:
forming a gate line, a data line and a drain electrode on a first substrate, the data line intersecting the gate line and the drain electrode facing the data line;
forming a thin film transistor on the first substrate and connected to the gate line and the data line;
connecting a pixel electrode to the thin film transistor, the pixel electrode including a plurality of sub-pixel electrodes; and
forming a connection assistant connecting the sub-pixel electrodes of one pixel to each other;
wherein at least one of the sub-pixel electrodes is connected to the drain electrode.
9. The method of claim 8 , wherein the forming a connection assistant comprises forming the connection assistant on a different layer of the array panel than the pixel electrode.
10. The method of claim 8 , wherein the forming a connection assistant comprises forming the connection assistant on a same layer of the array panel as the pixel electrode, the connection assistant including a first connection portion and a second connection portion,
wherein the first connection portion and the second connection portion are connected to edges of the sub-pixel electrodes and are alternately disposed towards left and right sides of the pixel electrode.