IP Library Granted Patent US 7,323,825
Granted Patent B2
US 7,323,825 · App. 11/607,358 · Granted Jan 29, 2008

Ballast integrated circuit (IC)

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Quick Facts
Patent No.
US 7,323,825
App. No.
11/607,358
Granted
Jan 29, 2008
Kind
B2
Abstract

A ballast integrated circuit (IC) for driving a first switching element and a second switching element includes: a variable gain amplifier (VGA) connected to a first input terminal connected to a resistor, for generating an output current signal according to a resistance value of the resistor and a gain control signal; a preheating/ignition controller connected to a second input terminal connected to a capacitor, for generating an output current signal and an output voltage signal acting as the gain control signal according to a voltage of the second input terminal; an active zero-voltage controller for generating a hard-switching current signal and an active zero-voltage switching current signal, such that it adjusts the voltage of the second input terminal according to switching states of the first switching element and the second switching element; an oscillator for generating an oscillation signal upon receiving the output current signal from the variable gain amplifier (VGA); and a dead-time controller for receiving the voltage signal of the second input terminal and an output signal of the oscillator, adjusting a dead time using the received signals, and at the same time generating driving signals of the first and second switching elements.

Claims (31)

1. A ballast integrated circuit (IC) for driving a first switching element and a second switching element, comprising:

a variable gain amplifier (VGA) connected to a first input terminal connected to a resistor for generating an output current signal according to a resistance value of the resistor and a gain control signal;

a preheating/ignition controller connected to a second input terminal connected to a capacitor, for generating an output current signal and an output voltage signal acting as the gain control signal according to a voltage of the second input terminal;

an active zero-voltage controller for generating a hard-switching current signal and an active zero-voltage switching current signal, such that it adjusts the voltage of the second input terminal according to switching states of the first switching element and the second switching element;

an oscillator for generating an oscillation signal upon receiving the output current signal from the variable gain amplifier (VGA); and

a dead-time controller for receiving the voltage signal of the second input terminal and an output signal of the oscillator, adjusting a dead time using the received signals, and generating driving signals of the first and second switching elements.

2. The ballast integrated circuit (IC) according to claim 1 , further comprising:

a voltage/current converter for converting a voltage signal of the first input terminal into a current signal, and transmitting the current signal to the variable gain amplifier (VGA).

3. The ballast integrated circuit (IC) according to claim 1 , further comprising:

an edge detector for detecting a rising- or falling- edge generated at an output voltage of an output unit equipped with the first and second switching elements using a first or second terminal of an auxiliary power-supply unit capable of driving the first switching element, generating an edge detection signal, and transmitting the edge detection signal to the active zero-voltage switching controller.

4. The ballast integrated circuit (IC) according to claim 3 , the edge detector comprising a MOS transistor, wherein a first terminal of the MOS transistor is coupled to the first or second terminal of the auxiliary power-supply unit, and allows a current signal proportional to a variation of the output voltage to flow in a parasitic capacitor located between the first terminal and a second terminal of the MOS transistor.

5. The ballast integrated circuit (IC) according to claim 3 , wherein the edge detector comprises a diode, wherein a first terminal of the diode is coupled to a first or second terminal of the auxiliary power-supply unit, and allows a current signal proportional to a variation of the output voltage to flow in a parasitic capacitor located between the first terminal and the second terminal of the diode.

6. The ballast integrated circuit (IC) according to claim 5 , wherein the edge detector comprises:

a diode including the parasitic capacitor located between the first terminal and the second terminal, connecting the first terminal to the first or second terminal of the auxiliary power-supply unit, and receiving an amount of the variation of the output voltage;

a voltage/current converter for converting a current signal generated from the second terminal of the diode into a voltage signal;

first and second comparators for generating a rising-edge detection signal and a falling-edge detection signal according to an output signal of the voltage/current converter, respectively; and

an OR gate for receiving the rising-edge detection signal and the falling-edge detection signal, performing a logic OR operation on the received detection signals, and generating the OR-operation resultant signal as the edge detection signal.

7. The ballast integrated circuit (IC) according to claim 3 , wherein the active zero-voltage switching controller is configured to determine whether the first and second switching elements perform a hard switching operation or a zero-voltage switching operation by referring to the edge detection signal, whereby

if the hard switching operation is determined, the active zero-voltage switching controller generates the hard-switching current signal, and

if the active zero-voltage switching operation is determined, the active zero-voltage switching controller generates the active zero-voltage switching current signal.

8. The ballast integrated circuit (IC) according to claim 1 , wherein the edge detector comprises:

a MOS transistor including the parasitic capacitor located between the first terminal and the second terminal, connecting the first terminal to the first or second terminal of the auxiliary power-supply unit, and receiving an amount of the variation of the output voltage;

a voltage/current converter for converting a current signal generated from the second terminal of the MOS transistor into a voltage signal;

first and second comparators for generating a rising-edge detection signal and a falling-edge detection signal according to an output signal of the voltage/current converter, respectively; and

an OR gate for receiving the rising-edge detection signal and the falling-edge detection signal, performing a logic OR operation on the received detection signals, and generating the OR-operation resultant signal as the edge detection signal.

9. The ballast integrated circuit (IC) according to claim 1 , further comprising:

a mode detector for determining whether a preheating mode and an ignition mode are completed by referring to the voltage of the second input terminal, and transmitting an enable signal to the active zero-voltage switching controller after detecting the completion of the preheating and ignition modes.

10. The ballast integrated circuit (IC) according to claim 9 , wherein the mode detector, if the voltage of the second input terminal is equal to or higher than a predetermined value, recognizes a dead-time control mode, generates the enable signal, stops an operation of the preheating/ignition controller, and activates an operation of the active zero-voltage switching controller.

11. The ballast integrated circuit (IC) according to claim 9 , further comprising:

an under voltage lock-out (UVLO) unit for transmitting a reset signal to the mode detector if a power-supply voltage is equal to or less than a predetermined value required for normal operations, thereby stopping an operation of the ballast IC.

12. The ballast integrated circuit (IC) according to claim 9 , wherein the mode detector, if the voltage of the second input terminal is equal to or higher than a predetermined magnitude, recognizes a dead-time control mode, generates the enable signal, stops an operation of the preheating/ignition controller, and activates an operation of the active zero-voltage switching controller, determines if the voltage of the second input terminal is equal to or less than a predetermined magnitude, and finally stops an operation of the ballast IC when the voltage of the second input terminal is equal to or less than a predetermined magnitude.

Assignments (4)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 04481, FRAME 0541 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064072/0459 →
PATENT SECURITY AGREEMENT Recorded Nov 17, 2017
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 044481/0541 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 2, 2017
From: FAIRCHILD KOREA SEMICONDUCTOR, LTD.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 044361/0205 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 7, 2007
From: HWANG, JONG-TAE; KIM, DAE-HO; JUNG, MOON-SANG; KIM, DONG-HWAN
To: FAIRCHILD KOREA SEMICONDUCTOR, LTD.
Reel/Frame 020226/0551 →