Input voltage sensing circuit

1. An input voltage sensing circuit comprising:

a circuit input terminal;

a comparator having first and second input terminals, the first of said input terminals being coupled to a reference voltage;

a switch circuit provided between the circuit input terminal and the second of the input terminals of the comparator, the switch circuit being provided to protect the comparator from voltages exceeding a predetermined voltage at which the switch circuit turns off; and

an electrostatic discharge circuit coupled to the circuit input terminal for discharging electrostatic induced voltages exceeding a predetermined value, wherein the electrostatic discharge circuit comprises first and second reverse series connected diodes, the first diode comprising a low voltage diode for blocking conduction when the input voltage exceeds a predefined negative voltage and the second diode comprising a high voltage termination diode.

2. The input voltage sensing circuit of claim 1 , further comprising a resistor in series with the switch circuit.

3. The input voltage sensing circuit of claim 2 , wherein the second diode provides a high voltage substrate for the resistor.

4. The input voltage sensing circuit of claim 1 , wherein the electrostatic discharge circuit comprises a structure wherein the second diode comprises a PN junction, and wherein a P region forming the diode is a circular isolation surrounding a presum high voltage N epitaxial region forming the N region of the diode, a low voltage N epitaxial region being provided on an opposite side of said P region from said high voltage N epitaxial region, said structure containing a parasitic NPN transistor comprising the N epitaxial high voltage region, the P region and the low voltage N epitaxial region and further comprising a parasitic PNP transistor by a further P region connected to the circuit input terminal, the N epitaxial high voltage region and said isolation presum and wherein said parasitic NPN and PNP transistors form a thyristor, and wherein a gain of the parasitic NPN transistor is reduced so that the gain of the NPN transistor multiplied by a gain of the PNP transistor will be less than 1 thereby preventing the thyristor from turning on when the input voltage goes negative.

5. The input voltage sensing circuit of claim 4 , wherein there is provided a second P isolation region surrounding the low voltage N epitaxial region and the low voltage N epitaxial region is left floating, there being provided a further N epitaxial region on an opposite side of said second P region.

6. The input voltage sensing circuit of claim 5 , wherein there is provided a resistor for adjusting a collector-emitter breakdown voltage of the parasitic PNP transistor disposed between said circuit input terminal and said high voltage N epitaxial region.

7. The input voltage sensing circuit of claim 5 , wherein said P regions are coupled to ground and said second N epitaxial region is coupled to a voltage source.

8. The input voltage sensing circuit of claim 5 , further comprising at least one additional floating N epitaxial region and P isolation region provided to further reduce the gain of the parasitic NPN transistor.

9. An input voltage sensing circuit comprising:

a circuit input terminal;

a comparator having first and second input terminals, the first of said input terminals being coupled to a reference voltage;

a switch circuit provided between the circuit input terminal and the second of the input terminals of the comparator, the switch circuit being provided to protect the comparator from voltages exceeding a predetermined voltage at which the switch circuit turns off; and

an electrostatic discharge circuit coupled to the circuit input terminal for discharging electrostatic induced voltages exceeding a predetermined positive value and a predetermined negative value;

wherein the switch circuit comprises a transistor;

wherein the transistor comprises a MOSFET having drain and source terminals connected in series between the circuit input terminal and the second comparator input terminal and having a gate connected to a voltage level at approximately which the transistor turns off; and

further comprising a current source coupled to said second input of the comparator for providing a current to forward bias a body diode of said MOSFET to allow negative input voltage sensing.

10. The input voltage sensing circuit of claim 9 , further comprising a resistor in series with the switch circuit.

11. The input voltage sensing circuit of claim 10 , wherein the resistor comprises a low voltage polysilicon resistor.

12. An input voltage sensing circuit comprising:

a circuit input terminal;

a comparator having first and second input terminals, the first of said input terminals being coupled to a reference voltage;

a switch circuit provided between the circuit input terminal and the second of the input terminals of the comparator, the switch circuit being provided to protect the comparator from voltages exceeding a predetermined voltage at which the switch circuit turns off; and

an electrostatic discharge circuit coupled to the circuit input terminal for discharging electrostatic induced voltages exceeding a predetermined value, wherein the circuit is provided to sense a voltage across source-drain terminals of a MOSFET used as a synchronous rectifier to determine when to turn on the MOSFET.