IP Library Granted Patent US 8,134,842
Granted Patent B2
US 8,134,842 · App. 11/618,235 · Granted Mar 13, 2012

Systems and methods for converting a computer rear transition input/output (I/O) to front panel I/O

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Quick Facts
Patent No.
US 8,134,842
App. No.
11/618,235
Granted
Mar 13, 2012
Kind
B2
Abstract

A method for converting a computer rear transition input/output (I/O) to front panel I/O is described. The method includes providing a main board having a first main connector having a first set of pins, and affixing a second main connector having a second set of pins to the main board, where a direction of lengths of the first set of pins is other than parallel to a direction of lengths of the second set of pins.

Claims (21)

1. A system for converting a computer rear transition input/output (I/O) to front panel I/O, said system comprising:

a main board having a first main connector having a first set of pins, a direction of lengths of the first set of pins being configured to extend along a first x-axis; and

a second main connector having a second set of pins, a direction of lengths of the second set of pins being configured to extend along a second x-axis, the second main connector being affixed to the main board;

wherein a first y-axis relative to the first x-axis is other than parallel to a second y-axis relative to the second x-axis; and

wherein one of the first or the second main connectors is configured to route an I/O signal from the rear transition I/O to a connector on the front panel I/O for connection of a cable at the front panel, and wherein the first set of pins and the second set of pins are configured to conductively communicate with the main board.

2. A system in accordance with claim 1 , wherein said first main connector is one of a compact peripheral component interface (CPCI) J1 connector and a CPCI J2 connector.

3. A system in accordance with claim 1 , wherein a processor is integrated within the main board.

4. A system in accordance with claim 1 , wherein the direction of lengths of the first set of pins is perpendicular to the direction of lengths of the second set of pins.

5. A system in accordance with claim 1 further comprising:

a mezannine board; and

a mezannine connector coupled to the mezannine board, wherein said mezannine connector is electrically connected to the second main connector.

6. A system in accordance with claim 1 further comprising:

a mezannine board;

a mezannine connector coupled to the mezannine board, wherein said mezannine connector is electrically connected to the second main connector; and

an expansion site configured to receive said mezannine board, wherein said expansion site is configured to mechanically couple to a PCI mezannine card (PMC).

7. A computer comprising:

a main board including a processor, a memory, and a first main connector having a first set of pins, a direction of lengths of the first set of pins being configured to extend along a first x-axis; and

a second main connector having a second set of pins, a direction of lengths of the second set of pins being configured to extend along a second x-axis, the second main connector being affixed to the main board, wherein a first y-axis relative to the first x-axis is other than parallel to a second y-axis relative to the second x-axis, and wherein one of the first or the second main connectors is configured to route an I/O signal from the rear transition I/O to a connector on the front panel I/O for connection of a cable at the front panel, wherein the first set of pins and the second set of pins are configured to conductively communicate with the main board.

8. A system in accordance with claim 7 , wherein said first main connector is one of a compact peripheral component interface (CPCI) J1 connector and a CPCI J2 connector.

9. A system in accordance with claim 7 , wherein a processor is integrated within the main board.

10. A system in accordance with claim 7 , wherein the direction of lengths of the first set of pins is perpendicular to the direction of lengths of the second set of pins.

Assignments (10)
RELEASE OF SECURITY INTEREST Recorded May 5, 2021
From: CORTLAND CAPITAL MARKET SERVICES LLC
To: ABACO SYSTEMS HOLDING CORP; ABACO SYSTEMS, INC
Reel/Frame 056148/0107 →
RELEASE OF SECURITY INTEREST Recorded May 5, 2021
From: CORTLAND CAPITAL MARKET SERVICES LLC
To: ABACO SYSTEMS HOLDING CORP; ABACO SYSTEMS, INC
Reel/Frame 056148/0112 →
RELEASE OF SECURITY INTEREST Recorded Nov 15, 2016
From: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
To: ABACO SYSTEMS, INC .
Reel/Frame 040327/0797 →
CORRECTIVE ASSIGNMENT TO CORRECT THE SCHEDULE A OF THE FIRST LIEN INTELLECTUAL PROPERTY COLLATERAL AGREEMENT PREVIOUSLY RECORDED ON REEL 037248 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jan 21, 2016
From: ABACO SYSTEMS HOLDING CORP.; ABACO SYSTEMS, INC.
To: CORTLAND CAPITAL MARKET SERVICES LLC, AS COLLATERAL AGENT
Reel/Frame 037568/0414 →
CORRECTIVE ASSIGNMENT TO CORRECT THE SCHEDULE A OF THE SECOND LIEN INTELLECTUAL PROPERTY COLLATERAL AGREEMENT PREVIOUSLY RECORDED ON REEL 037248 FRAME 0539. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jan 21, 2016
From: ABACO SYSTEMS HOLDING CORP.; ABACO SYSTEMS, INC.
To: CORTLAND CAPITAL MARKET SERVICES LLC, AS COLLATERAL AGENT
Reel/Frame 037568/0494 →
SECURITY AGREEMENT Recorded Dec 16, 2015
From: ABACO SYSTEMS, INC.
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH, AS COLLATERAL AGENT
Reel/Frame 037312/0630 →
CHANGE OF NAME Recorded Dec 10, 2015
From: GE INTELLIGENT PLATFORMS EMBEDDED SYSTEMS, INC.
To: ABACO SYSTEMS, INC .
Reel/Frame 037259/0952 →
CHANGE OF NAME Recorded Sep 7, 2015
From: GE FANUC EMBEDDED SYSTEMS, INC.
To: GE FANUC INTELLIGENT PLATFORMS EMBEDDED SYSTEMS, INC.
Reel/Frame 036562/0328 →
CHANGE OF NAME Recorded Sep 7, 2015
From: GE FANUC INTELLIGENT PLATFORMS EMBEDDED SYSTEMS, INC.
To: GE INTELLIGENT PLATFORMS EMBEDDED SYSTEMS, INC.
Reel/Frame 036562/0336 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 29, 2006
From: ORR, CHRIS ERWIN
To: GE FANUC EMBEDDED SYSTEMS, INC.
Reel/Frame 018694/0748 →