IP Library Granted Patent US 8,792,777
Granted Patent B2
US 8,792,777 · App. 11/621,764 · Granted Jul 29, 2014

Accurate fast forward rate when performing trick play with variable distance between frames

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Quick Facts
Patent No.
US 8,792,777
App. No.
11/621,764
Granted
Jul 29, 2014
Kind
B2
Abstract

The present invention is directed to system(s), method(s), and apparatus for accurate fast forward rate when performing trick play with variable distance between frames. In one embodiment, there is presented a circuit for providing a fast forward video sequence. The circuit comprises a system time clock for providing a time reference, said time reference incremented at a predetermined fast forward rate; a comparator for comparing the time reference with timing information associated with a picture; and a controller for determining whether to display the picture based at least in part on the comparison between the timing information and the time reference.

Claims (32)

1. A method of fast forwarding a video sequence, the method comprising:

incrementing a value of a system time clock at a predetermined fast forward rate during a fast forward mode;

during the fast forward mode, selecting from a plurality of intracoded pictures in the video sequence an intracoded picture having timing information nearest to the value of the system time clock but not exceeding the value of the system time clock; and

displaying the selected intracoded picture.

2. The method of claim 1 , wherein the timing information comprises presentation timing information.

3. The method of claim 1 , further comprising repeatedly selecting the intracoded picture until the timing information of the intracoded picture exceeds the value of the system time clock.

4. The method of claim 1 , further comprising not displaying a non-intracoded picture during the fast forward mode.

5. The method of claim 1 , further comprising not displaying the intracoded picture during a portion of the fast forward mode when the timing information exceeds the value of the system time clock.

6. The method of claim 1 , wherein the method is performed in a controller.

7. The method of claim 1 , wherein the intracoded picture is displayed instead of another picture that has corresponding timing information that is closer to the value of the system time clock than the timing information for the intracoded picture.

8. A circuit that provides a fast forward video sequence, the circuit comprising:

a system time clock comprising a value that is incremented at a predetermined fast forward rate during a fast forward mode;

a comparator configured to compare the value of the system time clock with timing information associated with at least a portion of a plurality of pictures in a video sequence; and

a controller configured to select, during the fast forward mode, an intracoded picture in the video sequence if the comparison indicates that the timing information does not exceed the value of the system time clock, wherein the controller is further configured to provide the selected intracoded picture to a decoder.

9. The circuit of claim 8 , wherein the controller increments the value of the system time clock at the predetermined fast forward rate during the fast forward mode.

10. The circuit of claim 8 , further comprising an extractor configured to extract the timing information from a header associated with the at least a portion of the pictures in the video sequence.

11. The circuit of claim 8 , wherein the controller determines to display the intracoded picture if the timing information associated with the picture does not exceed the value of the system time clock and another intracoded picture does exceed the value of the system time clock.

12. The circuit of claim 8 , further comprising a display engine, wherein the decoder is configured to decode the intracoded picture and to supply the decoded intracoded picture to the display engine, and wherein the display engine is configured to output the decoded intracoded picture until another picture is supplied by the decoder.

13. The circuit of claim 8 , wherein the controller is further configured to repeatedly select the intracoded picture until the timing information of the intracoded picture exceeds the value of the system time clock.

14. The circuit of claim 8 , wherein the controller is further configured to not display a non-intracoded picture during the fast forward mode.

15. The circuit of claim 8 , wherein the controller is further configured to not display the picture during the fast forward mode if the picture is intracoded and the timing information associated with the picture exceeds the the value of the system time clock.

16. The circuit of claim 8 , wherein the intracoded picture is displayed instead of another picture that has corresponding timing information that is closer to the value of the system time clock than the timing information for the intracoded picture.

17. A circuit that provides a fast forward video sequence, the circuit comprising:

a controller;

a memory connected to the controller, the memory storing a plurality of instructions executable by the controller, wherein execution of the instructions by the controller causes:

incrementing a value of a system time clock at a predetermined fast forward rate during a fast forward mode; and

selecting, during the fast forward mode, an intracoded picture from a plurality of intracoded pictures in the video sequence, the intracoded picture having timing information nearest to the value of the system time clock but not exceeding the value of the system time clock; and

displaying the selected intracoded picture during the fast forward mode.

18. The circuit of claim 17 , wherein execution of the instructions further causes extracting the timing information from a header associated with the intracoded picture.

19. The circuit of claim 17 , wherein the intracoded picture is displayed instead of another picture that has corresponding timing information that is closer to the value of the system time clock than the timing information for the intracoded picture.

20. The circuit of claim 17 , wherein the timing information is a presentation time stamp.

21. The circuit of claim 17 , wherein the intracoded picture is displayed instead of another picture that has corresponding timing information that is closer to the value of the system time clock than the timing information for the intracoded picture.

Assignments (9)
CORRECTIVE ASSIGNMENT TO CORRECT THE ERROR IN RECORDING THE MERGER IN THE INCORRECT US PATENT NO. 8,876,094 PREVIOUSLY RECORDED ON REEL 047351 FRAME 0384. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 8, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 049248/0558 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE OF THE MERGER PREVIOUSLY RECORDED AT REEL: 047230 FRAME: 0910. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Oct 29, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047351/0384 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047230/0910 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: BROADCOM CORPORATION
Reel/Frame 041712/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2017
From: BROADCOM CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041706/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: BROADCOM CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037806/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE, WHICH SHOULD BE BROADCOM ADVANCED COMPRESSION GROUP, LLC PREVIOUSLY RECORDED ON REEL 023822 FRAME 0622. ASSIGNOR(S) HEREBY CONFIRMS THE BROADCOM ADVANCED COMPRESSION GROUP, LLC DOCUMENT ID NUMBER 501071225. Recorded Mar 4, 2010
From: ROSS, TIM
To: BROADCOM ADVANCED COMPRESSION GROUP, LLC
Reel/Frame 024028/0408 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 21, 2010
From: ROSS, TIM
To: BROADCOM CORPORATION
Reel/Frame 023822/0622 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 25, 2009
From: BROADCOM ADVANCED COMPRESSION GROUP, LLC
To: BROADCOM CORPORATION
Reel/Frame 022299/0916 →