IP Library Granted Patent US 8,158,201
Granted Patent B1
US 8,158,201 · App. 11/622,964 · Granted Apr 17, 2012

Method of manufacturing surface coatings for electronic systems

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Quick Facts
Patent No.
US 8,158,201
App. No.
11/622,964
Granted
Apr 17, 2012
Kind
B1
Abstract

A bi- or multi-layer coating is deposited upon a substrate using a low temperature process. The bi-layer is a lower layer of a SAM coating, which is overlaid with a hard coating. The hard coating can be made of materials such as: polymer, Si 3 N 4 , BN, TiN, Si0 2 , Al 2 0 3 , Zr0 2 , YSZ, and other ceramic materials, and the underlying, compliant, SAM coating can comprise substances containing long chain molecules that chemically bond to the substrate. This bi-layer provides both environmental and hermetical protection to electronic hardware and MEMS systems, without employing expensive packaging materials and processes. Multiple bi-layers may be combined to form multi-layer coatings. A protective polymer or other material may optionally be formed as an outside layer.

Claims (25)

1. A method for coating a substrate, comprising:

providing a substrate;

selectively coating a portion of the substrate with a coating material;

selectively organizing a top layer selected from the group consisting of a ceramic layer, an oxide layer, an epoxy layer, and a phosphorous-based polyimide, and a thermally resistant over the region of self-assembling monolayer, without organization of the top layer over the portion of the substrate coated with the coating material.

2. The method according to claim 1 , wherein the top layer improves a thermal stability and reduces oxidation of the underlying self-assembling monolayer, and wherein the self-assembling monolayer acts as a buffer layer for the top layer.

3. The method according to claim 1 , wherein the top layer comprises a ceramic, said ceramic being formed by pyrolysis.

4. The method according to claim 1 , wherein the top layer comprises a metal oxide.

5. The method according to claim 1 , wherein the top layer comprises an epoxy polymer.

6. The method according to claim 1 , wherein the top layer comprises a phosphorous-based polyimide polymer.

7. The method according to claim 1 , wherein said selectively forming a self-assembling monolayer comprises selectively chemisorbing an alkyltrichlorosilane on the substrate.

8. The method according to claim 1 , further comprising the steps of selectively forming an additional self-assembling monolayer on previously formed regions of the top layer, and subsequently selectively organizing an additional top layer selected from the group consisting of a ceramic layer, an oxide layer, an epoxy layer, and a phosphorous-based polyimide, over the region of additional self-assembling monolayer.

9. The method according to claim 1 , wherein said selectively forming a self-assembling monolayer comprises immersing the substrate into a dilute, solution of molecules that selectively adhere to uncoated regions of the substrate, said molecules arranging themselves into densely-packed mono-layers.

10. The method according to claim 1 , wherein the top layer comprises a material that is selected from a group of materials consisting of: a ceramic material, ZrO 2 , yttrium stabilized zirconia, silicon dioxide, AlMgO, NiFeO, indium oxide, tin oxide, indium tin oxide, YbaCuO, BiSrCaCuO, LaSrMnO, NiO, CuO, FeAlO, Al 2 O 3 , aluminum nitride, TiN, BN, Si 3 N 4 , FeAlN, and combinations thereof.

11. The method according to claim 1 , wherein the resulting substrate comprises at least one structure comprising a self-assembling monolayer sandwiched between two layers each independently selected materials selected from the group consisting of a ceramic material, ZrO 2 , yttrium stabilized zirconia, silicon dioxide, AlMgO, NiFeO, indium oxide, tin oxide, indium tin oxide, YbaCuO, BiSrCaCuO, LaSrMnO, NiO, CuO, FeAlO, Al 2 O 3 , aluminum nitride, TiN, BN, Si 3 N 4 , FeAlN, and combinations thereof.

12. The method according to claim 1 , wherein a maximum process temperature for forming said resulting substrate is less than 300° C.

13. The method according to claim 1 , wherein the substrate comprises silicon.

14. The method according to claim 1 , wherein coating material comprises at least one metallic bonding pad on a semiconductor substrate.

15. The method according to claim 1 , further comprising the step of removing the self-assembling monolayer after organizing the top layer.

16. The method according to claim 1 , wherein the self-assembling monolayer comprises a phosphonate self-assembling monolayer.

17. The method according to claim 1 , wherein the self-assembling monolayer comprises an organic molecule having a chain length of greater than two.

18. The method according to claim 1 , further comprising selectively applying said self-assembling monolayer to a first portion of the substrate, leaving a second portion of the substrate uncovered, the ceramic layer being formed only over the areas of the substrate coated with the self-assembling monolayer, resulting in at least one region of the substrate which is without the ceramic layer.

19. A method for coating a substrate, comprising:

a) selectively applying a self-assembling monolayer coating under-layer to first exposed portions of the substrate, and preventing the self-assembling monolayer coating from forming over second exposed portions of the substrate; and

b) selectively applying a ceramic layer over said self-assembling monolayer, without applying the ceramic layer over the second exposed portions, through at least one of an aqueous solution method or a prepolymer method.

20. The method according to claim 19 , wherein the ceramic is deposited on the self-assembling monolayer using an aqueous solution method.

Assignments (1)
CHANGE OF NAME Recorded Jan 2, 2014
From: THE RESEARCH FOUNDATION OF STATE UNIVERSITY OF NEW YORK
To: THE RESEARCH FOUNDATION FOR THE STATE UNIVERSITY OF NEW YORK
Reel/Frame 031896/0589 →