IP Library Granted Patent US 7,618,881
Granted Patent B2
US 7,618,881 · App. 11/625,214 · Granted Nov 17, 2009

Thin-film transistor and manufacturing method thereof

Assignees: NEC Corporation; NEC LCD Technologies, Ltd.
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Quick Facts
Patent No.
US 7,618,881
App. No.
11/625,214
Granted
Nov 17, 2009
Kind
B2
Abstract

A method for forming a thin-film transistor on an insulating substrate includes the steps of: forming a non-single-crystal semiconductor thin film on the insulating substrate; forming a gate insulating film on the non-single-crystal semiconductor thin film; forming a gate electrode including a lower gate electrode and an upper gate electrode on the gate insulating film, the lower gate electrode having a portion that is not covered by the upper gate electrode; forming a source-drain region and an LDD (lightly doped drain) region in the non-single-crystal thin film semiconductor film concurrently by introducing an impurity into the non-single-crystal semiconductor thin film through the gate electrode and the gate insulating film; and etching away an exposed portion of the lower gate electrode by using the upper gate electrode as a mask.

Claims (15)

1. A method for manufacturing a thin-film transistor, comprising the steps of:

forming a non-single-crystal semiconductor thin film on an insulating substrate;

forming a gate insulating film on the non-single-crystal semiconductor thin film;

forming a gate electrode including a lower gate electrode and an upper gate electrode on the gate insulating film, the lower gate electrode having a portion that is not covered by the upper gate electrode;

forming a heavily doped region and a lightly doped region in the non-single-crystal semiconductor thin film concurrently by introducing an impurity into the non-single-crystal semiconductor thin film through the gate electrode and the gate insulating film; and

etching away an exposed portion of the lower gate electrode by using the upper gate electrode as a mask,

wherein the step of forming a gate electrode comprises the steps of:

forming a conductive film including a plurality of layers on the gate insulating film; and

forming the gate electrode by selectively etching the conductive film, wherein the step of forming a gate electrode comprises the steps of:

forming a conductive film including a plurality of layers on the gate insulating film;

selectively forming a photoresist film on a top layer of the conductive film; and

forming the upper gate electrode by applying isotropic etching to the conductive film by using the photoresist film as a mask and forming the lower gate electrode by applying anisotropic etching to the conductive film by using the photoresist film as a mask.

2. The method according to claim 1 , wherein the non-single-crystal semiconductor thin film is a polysilicon thin film.

3. The method according to claim 1 , wherein the isotropic etching is wet etching.

4. The method according to claim 3 , wherein the gate insulating film is a silicon dioxide thin film, the conductive film including the plurality of layers includes a lower, microcrystalline silicon thin film and upper, chromium thin film; and an etchant used in the wet etching is an aqueous solution of diammonium cerium (IV) nitrate and perchloric acid.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 12, 2013
From: NEC CORPORATION
To: NLT TECHNOLOGIES, LTD.
Reel/Frame 031770/0135 →
CHANGE OF NAME Recorded Nov 8, 2011
From: NEC LCD TECHNOLOGIES, LTD.
To: NLT TECHNOLOGIES, LTD.
Reel/Frame 027195/0933 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 21, 2007
From: SATOU, TADASHI
To: NEC CORPORATION; NEC LCD TECHNOLOGIES, LTD.
Reel/Frame 018783/0643 →
Priority Claims (1)
JP 2006-014272 · Jan 23, 2006 · national
Continuity (1)
Related Publication 20070170526A1 · Jul 26, 2007