IP Library Granted Patent US 7,781,766
Granted Patent B2
US 7,781,766 · App. 11/625,359 · Granted Aug 24, 2010

Array substrate

Assignee: Au Optronics Corp.
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Quick Facts
Patent No.
US 7,781,766
App. No.
11/625,359
Granted
Aug 24, 2010
Kind
B2
Abstract

The invention provides a method for manufacturing an array substrate utilizing a laser ablation process. A conductive layer can be selectively patterned by the laser ablation process without a photo mask due to different adhesions between the conductive layer and other materials. The patterned conductive layer thus formed adjoins an inorganic passivation layer to provide a substantially continuous surface.

Claims (12)

1. An array substrate, comprising: a contact pad, a thin film transistor (TFT), a pixel region, and a storage capacitor formed on a substrate; an inorganic passivation layer formed on a part of the contact pad, the TFT, and the storage capacitor; and a conductive layer formed on an other part of the contact pad, an other part of the TFT, an other part of the storage capacitor, and the pixel region; wherein the inorganic passivation layer adjoins the conductive layer to form a substantially continuous surface; and wherein a top surface of the inorganic passivation layer is coplanar with a top surface of the conductive layer in an adjoining region therebetween.

2. The array substrate of claim 1 , wherein the conductive layer comprises transparent conductive materials, opaque conductive materials, or combinations thereof.

3. The array substrate of claim 1 , wherein the inorganic passivation layer comprises a silicon nitride, silicon oxide, silicon oxynitride, silicon carbide, or combinations thereof.

4. The array substrate of claim 1 , wherein a thickness of the inorganic passivation layer is substantially equal to the thickness of the conductive layer.

5. The array substrate of claim 1 , wherein the TFT comprises:

a gate electrode on the substrate;

a dielectric layer on the gate electrode;

a channel layer on the dielectric layer;

an ohmic contact layer and a source/drain metal layer on the channel layer, wherein the ohmic contact layer and the source/drain metal layer have an opening to expose the part of the channel layer.

6. The array substrate of claim 5 , wherein the TFT further comprises an etch stop layer formed on the channel layer.

7. A display incorporating the array substrate of claim 1 .

8. An electro-optical apparatus incorporating the display of claim 7 .

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 24, 2025
From: AUO CORPORATION
To: NEOLAYER LLC
Reel/Frame 072266/0941 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 22, 2007
From: SHIH, CHIH-HUNG; HUANG, MING-YUAN; YANG, CHIH-CHUN
To: AU OPTRONICS CORP.
Reel/Frame 018784/0068 →
Priority Claims (1)
TW 95126510 A · Jul 20, 2006 · national
Continuity (1)
Related Publication 20080018850A1 · Jan 24, 2008