IP Library Granted Patent US 7,898,547
Granted Patent B2
US 7,898,547 · App. 11/627,585 · Granted Mar 1, 2011

Memory controller for handling multiple clients and method thereof

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Quick Facts
Patent No.
US 7,898,547
App. No.
11/627,585
Filed
Jan 26, 2007
Granted
Mar 1, 2011
Kind
B2
Art Unit
2628
USPC
345/532
Abstract

A method and system is provided for organizing and routing multiple memory requests from a plurality of clients to multiple memories. Requests from a plurality of clients, including a plurality of clients of the same type, such as multiple MPEG decoders, are directed to different memory controllers by a router. The memory controllers order the client requests by requests among similar client types. The memory controllers also order the client requests by different client types. The ordered requests are then delivered to memory. Returned data is sent back to the clients. A method of mapping motion pictures experts group (MPEG) video information for improved efficiency is presented, wherein image information is stored in blocks of memory referred to as tiles. Tiles are mapped in memory so that adjacent tiles only correspond to different banks of memory.

Claims (89)

1. A method comprising:

receiving a first client request from a first video decoder;

selecting one of a first memory controller and a second memory controller based on the first client request to determine a first selected memory controller;

routing the first client request to the first selected memory controller by a router;

receiving a second client request from a second video decoder;

selecting one of the first memory controller and the second memory controller based on the second client request to determine a second selected memory controller; and

routing the second client request to the second selected memory controller by said router;

wherein the router determines whether to route the first request from the first video decoder to the first memory controller or the second memory controller, and wherein the router determines whether to route the second request from the second video decoder to the first memory controller or the second memory controller by accessing a register.

2. The method of claim 1 , further including providing the first client request to a first memory and the second client request to a second memory.

3. The method of claim 1 , wherein selecting to determine the first selected memory controller comprises selecting the first selected memory controller based on one or more of: an address, a client identifier, client tag information, or data size.

4. The method of claim 1 , wherein a number of requests routed to the first selected memory controller from a particular client is dependent on the data rate of the particular client.

5. The method of claim 1 , wherein the first selected memory controller is scalable.

6. The method of claim 1 , wherein:

the first video decoder is an MPEG decoder;

the first client request is a first HDTV stream;

the second video decoder is an MPEG decoder; and

the second client request is a second HDTV stream.

7. The method of claim 1 , wherein at least one of the first memory controller and the second memory controller is dedicated for use in handling requests received from a high-data rate client.

8. The method of claim 1 , wherein selecting to determine the first selected memory controller comprises selecting the first selected memory controller based on a round robin arbitration scheme.

9. The method of claim 1 , wherein selecting to determine the first selected memory controller comprises selecting the first selected memory controller based on a priority arbitration scheme selecting to determine the second selected memory controller comprises selecting the second selected memory controller based on a round robin arbitration scheme.

10. The method of claim 1 , wherein the first client request is associated with Luma information and the second client request is associated with Chroma information.

11. The method of claim 1 , wherein:

the first video decoder is an MPEG decoder;

the first client request is a first HDTV stream;

the second video decoder is an MPEG decoder; and

the second client request is DVD video stream.

12. The method of claim 1 , wherein:

the first video decoder is an MPEG decoder;

the first client request is a first HDTV stream;

the second video decoder is an MPEG decoder; and

the second client request is a first standard definition TV (SDTV) stream.

13. A device, comprising:

a first video decoder,

a second video decoder;

a first memory controller;

a second memory controller; and

a router coupled to the first video decoder, the second video decoder, the first memory controller, and the second memory controller, the router configured to route a first request from the first video decoder to the first memory controller or the second memory controller, and to route a second request from the second video decoder to the first memory controller or the second memory controller; and

wherein the router determines whether to route the first request from the first video decoder to the first memory controller or the second memory controller, and wherein the router determines whether to route the second request from the second video decoder to the first memory controller or the second memory controller by accessing a register.

14. The device of claim 13 , wherein the router is configured to route the first request based on a received tag associated with the first request.

15. The device of claim 13 , wherein the router is configured to route the first request based on a priority level associated with the first request and is configured to route the second request based on a round robin arbitration scheme.

16. The device of claim 13 , wherein the first request is associated with a first HDTV stream and the second request is associated with a second HDTV stream.

17. The device of claim 13 , wherein the first request is associated with an SDTV stream and the second request is associated with an HDTV stream.

18. The device of claim 13 , wherein the first request is associated with Luma information of a video stream and the second request is associated with Chroma information of the video stream.

19. The device of claim 13 , wherein the first request and the second request are tile accesses and wherein the first memory controller and the second memory controller further comprise a circuit for converting tile accesses to linear accesses.

20. The device of claim 13 , wherein the first request is a macroblock write.

21. A method comprising:

receiving a first client request from a first video decoder;

selecting one of a first memory controller and a second memory controller based on the first client request to determine a first selected memory controller;

routing the first client request to the first selected memory controller;

receiving a second client request from a second video decoder;

selecting one of the first memory controller and the second memory controller based on the second client request to determine a second selected memory controller;

routing the second client request to the second selected memory controller; and

converting tile accesses to linear accesses.

22. The method of claim 21 , further including providing the first client request to a first memory and the second client request to a second memory.

23. The method of claim 21 , wherein selecting to determine the first selected memory controller comprises selecting the first selected memory controller based on one or more of: an address, a client identifier, client tag information, or data size.

24. The method of claim 21 , wherein a number of requests routed to the first selected memory controller from a particular client is dependent on the data rate of the particular client.

25. The method of claim 21 , wherein the first selected memory controller is scalable.

26. The method of claim 21 , wherein:

the first video decoder is an MPEG decoder;

the first client request is a first HDTV stream;

the second video decoder is an MPEG decoder; and

the second client request is a second HDTV stream.

27. The method of claim 21 , wherein at least one of the first memory controller and the second memory controller is dedicated for use in handling requests received from a high-data rate client.

28. The method of claim 21 , wherein selecting to determine the first selected memory controller comprises selecting the first selected memory controller based on a round robin arbitration scheme.

29. The method of claim 21 , wherein selecting to determine the first selected memory controller comprises selecting the first selected memory controller based on a priority arbitration scheme selecting to determine the second selected memory controller comprises selecting the second selected memory controller based on a round robin arbitration scheme.

30. The method of claim 21 , wherein the first client request is associated with Luma information and the second client request is associated with Chroma information.

31. The method of claim 21 , wherein:

the first video decoder is an MPEG decoder;

the first client request is a first HDTV stream;

the second video decoder is an MPEG decoder; and

the second client request is DVD video stream.

32. The method of claim 21 , wherein:

the first video decoder is an MPEG decoder;

the first client request is a first HDTV stream;

the second video decoder is an MPEG decoder; and

the second client request is a first standard definition TV (SDTV) stream.

33. A device, comprising:

a first video decoder,

a second video decoder;

a first memory controller;

a second memory controller; and

a router coupled to the first video decoder, the second video decoder, the first memory controller, and the second memory controller, the router configured to route a first request from the first video decoder to the first memory controller or the second memory controller, and to route a second request from the second video decoder to the first memory controller or the second memory controller; and

wherein the first request and the second request are tile accesses and wherein the first memory controller and the second memory controller further comprise a circuit for converting tile access to linear accesses.

34. The device of claim 33 , wherein the router is configured to route the first request based on a received tag associated with the first request.

35. The device of claim 33 , wherein the router is configured to route the first request based on a priority level associated with the first request and is configured to route the second request based on a round robin arbitration scheme.

36. The device of claim 33 , wherein the first request is associated with a first HDTV stream and the second request is associated with a second HDTV stream.

37. The device of claim 33 , wherein the first request is associated with an SDTV stream and the second request is associated with an HDTV stream.

38. The device of claim 33 , wherein the first request is associated with Luma information of a video stream and the second request is associated with Chroma information of the video stream.

39. The device of claim 33 , wherein the first request is a macroblock write.

Assignments (8)
CORRECTIVE ASSIGNMENT TO CORRECT THE PROPERTY NUMBERS PREVIOUSLY RECORDED AT REEL: 47630 FRAME: 344. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Mar 21, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 048883/0267 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE OF MERGER TO 9/5/2018 PREVIOUSLY RECORDED AT REEL: 047196 FRAME: 0687. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Oct 29, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047630/0344 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047196/0687 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: BROADCOM CORPORATION
Reel/Frame 041712/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2017
From: BROADCOM CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041706/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: BROADCOM CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037806/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 7, 2009
From: ADVANCED MICRO DEVICES, INC.; ATI TECHNOLOGIES ULC; ATI INTERNATIONAL SRL
To: BROADCOM CORPORATION
Reel/Frame 022083/0433 →
CHANGE OF NAME Recorded Oct 14, 2008
From: ATI TECHNOLOGIES INC.
To: ATI TECHNOLOGIES ULC
Reel/Frame 021679/0230 →