IP Library Granted Patent US 7,550,759
Granted Patent B2
US 7,550,759 · App. 11/630,014 · Granted Jun 23, 2009

Capacitive single-electron transistor

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Quick Facts
Patent No.
US 7,550,759
App. No.
11/630,014
Granted
Jun 23, 2009
Kind
B2
Abstract

The invention is a sensitive measuring instrument, which is principally applied to quantum computation, especially to measurement of quantum bits consisting of superconducting micro and nano-structures. The state of a quantum bit is expressed as the voltage-time integral over a circuit component. Phase measurement is performed by measuring the capacitance of a single-electron transistor between the gate and ground.

Claims (22)

1. A method of determining a phase of a qubit having states defined by different phases, comprising:

establishing the qubit in a superconducting single-electron transistor (SSET) having a gate, a ground and a capacitance;

measuring the capacitance of the SSET between the gate and ground; and

determining the phase from the measured gate-to-ground capacitance.

2. The method according to claim 1 , wherein the qubit is a charge-phase qubit.

3. The method of claim 1 , including:

forming the SSET from first and second Josephson junctions;

forming the qubit from third and fourth Josephson junctions;

connecting the first Josephson junction of the SSET to the third Josephson junction of the qubit with a first conductor; and

connecting the second Josephson junction of the SSET to the fourth Josephson junction of the qubit with a second conductor; and

grounding said first and second conductors with said grounding carried out through a capacitance.

4. The method of claim 1 , comprising connecting the SSET gate to a resonance circuit having a) an inductance connected to a control voltage, and b) a grounded capacitor.

5. The method of claim 4 , wherein the resonance circuit has a resonance frequency, and including:

determining the capacitance of the SSET by measuring the resonance frequency.

6. The method of claim 5 , including using a magnetic flux to initiate said measuring.

7. The method of claim 4 , including measuring the phase by registering a reflection of a voltage surge directed to an outer connection point of the resonance circuit.

8. A capacitive single-electron transistor (C-SET) detector circuit apparatus for measuring a phase of a qubit having states defined by different phases, comprising:

a superconducting single-electron transistor (SSET) adapted to support the qubit, the SSET having a ground, a source, a drain, a gate having an associated gate voltage and an associated gate-to-ground capacitance (C G ), and a source-drain phase difference (φ) that corresponds to said gate-to-ground capacitance and that corresponds to said qubit phase; and

a resonance circuit electrically connected to the gate of the SSET and adapted to have a resonance frequency that depends on said gate-to-ground capacitance so that measuring the resonance frequency yields the qubit's state.

9. The apparatus of claim 8 , wherein the resonance circuit includes:

a grounded shunt capacitor; and

an inductor connected to a control voltage.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 19, 2010
From: MAGIQ TECHNOLOGIES, INC.
To: MAGIQ TECHNOLOGIES, INC
Reel/Frame 024697/0435 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 18, 2006
From: KORKEAKOULU, TEKNILLINEN
To: MAGIQ TECHNOLOGIES, INC.
Reel/Frame 018718/0065 →