IP Library Granted Patent US 7,440,330
Granted Patent B2
US 7,440,330 · App. 11/636,494 · Granted Oct 21, 2008

Semiconductor memory device

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Quick Facts
Patent No.
US 7,440,330
App. No.
11/636,494
Granted
Oct 21, 2008
Kind
B2
Abstract

A reference cell outputs a reference current of a data reading current of a memory cell. A trimming data in accordance with the reference current is memorized in a non-volatile memory cell. A standard current generator outputs a standard current whose current quantity is adjusted in accordance with the trimming data. A current comparator compares the standard current to the reference current. The output of the reference current from the reference cell is adjusted through a reference cell adjuster based on a result of the comparison by the current comparator.

Claims (17)

1. A semiconductor memory device comprising:

a memory cell;

a reference cell for outputting a reference current of a data reading current of the memory cell;

a non-volatile memory cell for memorizing a trimming data in accordance with the reference current;

a standard current generator for outputting a standard current in a state where a current quantity is adjusted in accordance with the trimming data;

a current comparator for comparing the standard current to the reference current; and

a reference cell adjuster for adjusting an output of the reference current from the reference cell based on a result of the comparison by the current comparator.

2. The semiconductor memory device as claimed in claim 1 , wherein the reference cell adjuster adjusts an output of the reference current by rewriting a threshold voltage of the reference cell.

3. The semiconductor memory device as claimed in claim 1 , wherein the reference cell has a structure equal to the memory cell to output the reference current.

4. The semiconductor memory device as claimed in claim 1 , further comprising an AD converter for converting the reference current into a digital value, wherein the non-volatile memory cell memorizes the digital value as the trimming data.

5. The semiconductor memory device as claimed in claim 1 , further comprising an adjustment necessary/unnecessary judger for judging whether or not adjustment of the reference cell is necessary based on a result of the comparison by the current comparator, wherein the reference cell adjuster adjusts the reference cell based on a result of judgment of the adjustment necessary/unnecessary judger.

6. The semiconductor memory device as claimed in claim 1 , wherein the reference cell adjuster adjusts the reference cell based on a result of the comparison by the current comparator or an external input signal.

7. The semiconductor memory device as claimed in claim 1 , further comprising a data corrector for correcting the trimming data in accordance with temperature characteristics of the standard current and the reference current.

8. The semiconductor memory device as claimed in claim 7 , wherein the data corrector corrects the trimming data in accordance with temperature characteristics of a plurality of temperature ranges of the standard current and the reference current.

9. The semiconductor memory device as claimed in claim 1 , further comprising:

a temperature detector for detecting an ambient temperature of the semiconductor memory device, and

a data corrector for correcting a trimming data retrieved from the non-volatile memory cell in accordance with a result of detection in the temperature detector.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 18, 2019
From: PANASONIC CORPORATION
To: NORTH PLATE SEMICONDUCTOR, LLC
Reel/Frame 048620/0757 →
LICENSE Recorded Sep 11, 2018
From: NORTH PLATE SEMICONDUCTOR, LLC
To: DIODES INCORPORATED
Reel/Frame 046843/0081 →
CHANGE OF NAME Recorded Mar 23, 2009
From: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
To: PANASONIC CORPORATION
Reel/Frame 022434/0348 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 11, 2007
From: NOICHI, SHUHEI
To: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
Reel/Frame 019279/0809 →