IP Library Granted Patent US 7,782,083
Granted Patent B2
US 7,782,083 · App. 11/639,374 · Granted Aug 24, 2010

Trimming circuits and methods

Assignee: Cambridge Semiconductor Limited
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Quick Facts
Patent No.
US 7,782,083
App. No.
11/639,374
Granted
Aug 24, 2010
Kind
B2
Abstract

Techniques for programming trimming circuitry of a power integrated circuit without the need for separate programming pins are disclosed. According to a first aspect of the invention, there is provided a power supply controller IC with internal circuitry, a plurality of external connections, the IC further comprising trimming circuitry with no external connections to the IC other than via shared ones of the external connections. The shared external connections can comprise a first connection comprising a data input for receiving data for programming the trimming circuitry, and a second, different connection comprising a select input to select between a data receiving mode for receiving data from the data input and a programming mode for programming the trimming circuitry using the received data.

Claims (9)

1. An integrated circuit (IC) including a plurality of non-volatile programmable elements and a Programming Through Leads (PTL) module for programming said elements, said PTL module comprising:

a first, serial data input;

a demodulator coupled to said first input for demodulating clock and data signals from a serial data signal on said serial data input;

a memory device coupled to said programmable elements and to said demodulator to store data demodulated from said serial data signal;

a second, state select input;

a state machine coupled to said state select input and to said memory device, said state machine having first and second states selectable by a signal on said second input, and wherein when said state machine is in said first state said PTL module is configured to input serial data from said first input and to store said serial data in said memory and when said state machine is in said second state said PTL module is configured to write said serial data stored in said memory to said non-volatile programmable elements.

2. An IC as claimed in claim 1 further comprising a voltage limiting or isolation circuit having an input coupled to said state select input and having an output for connection to further circuitry within said IC.

3. An IC as claimed in claim 1 wherein said state machine has a third state selectable by said signal on said state select input, said third state comprising a diagnostic state in which said stored data is output from said PTL module.

4. An IC as claimed in claim 1 wherein said state machine states are selectable by a voltage level on said state select input.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 13, 2015
From: POWER INTEGRATIONS, LIMITED
To: POWER INTEGRATIONS, INC.
Reel/Frame 036852/0533 →
RELEASE OF SECURITY INTEREST Recorded Jan 30, 2015
From: ETV CAPITAL S.A.
To: CAMBRIDGE SEMICONDUCTOR LIMITED
Reel/Frame 034858/0896 →
NUNC PRO TUNC ASSIGNMENT Recorded Jan 29, 2015
From: CAMBRIDGE SEMICONDUCTOR LIMITED
To: POWER INTEGRATIONS, LIMITED
Reel/Frame 034859/0458 →
DEBENTURE Recorded Aug 20, 2007
From: ETV CAPITAL S.A.
To: CAMBRIDGE SEMICONDUCTOR LIMITED
Reel/Frame 019714/0643 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 9, 2007
From: LALITHAMBIKA, VINOD A.; GARNER, DAVID M.; COULSON, DAVID ROBERT; ANSARI, ZAHID
To: CAMBRIDGE SEMICONDUCTOR LIMITED
Reel/Frame 018993/0059 →
Priority Claims (1)
GB 06248892 · Dec 14, 2006 · national
Continuity (1)
Related Publication 20080143422A1 · Jun 19, 2008