Protection of the flow of a program executed by an integrated circuit or of data contained in this circuit
A method for protecting an integrated circuit, including at least one non-volatile memory, including the steps of detecting a possible disturbance in the flow of a program executed by the integrated circuit, modifying the value of a digital variable in a volatile storage element in case of a disturbance detection and, in a way independent in time from the detection, intervening upon the non-volatile memory according to the value of said variable.
1. A method for protecting an integrated circuit comprising at least one non-volatile memory, comprising steps of:
detecting a possible disturbance in a flow of a program executed by the integrated circuit;
modifying a value of a digital variable in a volatile storage element when a disturbance is detected;
in a way independent from the detection of the disturbance, periodically checking the value of the digital variable; and
when the value of the digital variable indicates that the disturbance has been detected, modifying at least a portion of the at least one non-volatile memory according to the value of said digital variable.
2. The method of claim 1 , wherein modifying the at least a portion of the at least one non-volatile memory comprises copying of information representative of the value of the digital variable of the volatile storage element in an area of the at least one non-volatile memory.
3. The method of claim 1 , wherein the flow of the program executed by the integrated circuit is protected.
4. A method for protecting an integrated circuit comprising at least one non-volatile memory, the method comprising steps of:
detecting a possible disturbance in a flow of a program executed by the integrated circuit;
modifying a value of a digital variable in a volatile storage element when a disturbance is detected;
in a way independent from the detection of the disturbance, periodically checking the value of the digital variable;
copying information representative of the value of the digital variable to the at least one non-volatile memory; and
testing the value of said digital variable in the at least one non-volatile memory to determine whether to erase at least a portion of the at least one non-volatile memory,
wherein the flow of the program executed by the integrated circuit is protected.
5. The method of claim 1 , for protecting a digital quantity contained in said at least one non-volatile memory.
6. The method of claim 5 , wherein contents of said information copied to the at least one non-volatile memory condition a data output of the integrated circuit.
7. The method of claim 1 , wherein modifying the at least a portion of the at least one non-volatile memory comprises erasing at least one portion of the at least one non-volatile memory.
8. The method of claim 1 , wherein the modification of the at least one non-volatile memory is performed periodically.
9. The method of claim 1 , wherein said volatile storage element is a register of a central processing unit of the integrated circuit.
10. The method of claim 1 , wherein said volatile storage element is an area of a volatile memory of the integrated circuit.
11. An integrated circuit comprising at least a central processing unit, a first non-volatile memory, and a second volatile memory, at least one detector of an attempt to disturb the circuit operation, and comprising a protection mechanism for implementing the method of claim 1 .
12. A smart card, comprising the integrated circuit of claim 11 .
13. A device, comprising:
a flag configured to indicate an occurrence of a disturbance in an execution of a program running on the device;
a timer configured to control a periodical copying of a value of the flag to a bit word; and
a non-volatile storage element comprising the bit word, the non-volatile storage element configured to remove at least a portion of data stored in the non-volatile storage element if the value of the flag indicates the occurrence of the disturbance.
14. The device of claim 13 , wherein a detector detects the disturbance.
15. The device of claim 14 , wherein the value of the flag is set by the detector.
16. The device of claim 13 , wherein the timer is a counter of a central processing unit of the device.
17. The device of claim 13 , wherein the flag is stored in a volatile storage element or a register of a central processing unit.
18. The device of claim 13 , wherein the portion of data removed is confidential data.
19. A method, comprising:
setting a value of a digital variable according to an indication of a disturbance in an execution of a program;
periodically reading the value of a digital variable; and
intervening upon the non-volatile storage element according to the value of the digital variable,
wherein the digital variable is stored in a volatile storage element coupled to the non-volatile storage element.
20. The method of claim 19 , further comprising writing a memory word in a non-volatile storage element, a value of the memory word being equivalent to the value of the digital variable.
21. The method of claim 20 , further comprising reading the memory word before an operation considered vital for the execution of the program or for the security of the non-volatile memory.
22. The method of claim 21 , further comprising varying an address of the memory word in the non-volatile memory.
23. The method of claim 19 , wherein the intervening comprises clearing at least one portion of the data stored in the non-volatile storage element.
24. The method of claim 19 , wherein the intervening comprises halting the execution of the program.
25. The method of claim 19 , further comprising detecting, using a detector, the disturbance in the execution of the program.