IP Library Granted Patent US 7,622,793
Granted Patent B2
US 7,622,793 · App. 11/643,144 · Granted Nov 24, 2009

Flip chip shielded RF I/O land grid array package

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Quick Facts
Patent No.
US 7,622,793
App. No.
11/643,144
Granted
Nov 24, 2009
Kind
B2
Abstract

A novel apparatus and method for providing a radio frequency (“RF”) input/output (“I/O”) land grid array (“LGA”) package structure. The package structure comprises grounded shield rings surrounding free-standing RF I/O interconnects. The free-standing RF I/O interconnects eliminate long leads and the shield rings provide ground protection thereby minimizing losses, inductance, leakage, and crosstalk, and improving performance.

Claims (17)

1. A shielded land grid array package, comprising:

a lead-frame substrate defining at least one free-standing radio frequency (RF) interconnect surrounded by at least one shield ring, the at least one free-standing RF interconnect being held in place by a first encapsulate;

at least one flip chip mounted to the at least one free-standing RF interconnect wherein a flip chip RF lead couples to the at least one free-standing RF interconnect and a flip chip ground lead couples to the shield ring; and

a second encapsulate disposed over the lead frame substrate, the at least one free-standing RF interconnect, and the at least one flip chip.

2. The package of claim 1 , wherein the lead-frame substrate is made of a metal selected from the group consisting of copper, copper alloy, nickel-iron alloy, and nickel-cobalt alloy.

3. The package of claim 1 , further comprising a slot in a surface of the lead-frame substrate for facilitating bonding of the second encapsulate.

4. The package of claim 1 , wherein the shield ring is defined as a continuous shield ring.

5. The package of claim 1 , wherein the shield ring is defined as a split shield ring.

6. The package of claim 1 , wherein the shield ring is circular in shape.

7. The package of claim 1 , wherein the shield ring is polygonal in shape.

8. The package of claim 1 , wherein the flip chip is an Integrated Circuit (IC).

9. The package of claim 1 , further comprising at least one package component mounted to the lead-frame substrate.

10. The package of claim 1 , further comprising an underfill disposed between the lead-frame substrate and the at least one flip chip.

11. The package of claim 1 , further comprising a third encapsulate disposed between the lead frame substrate and the at least one flip chip.

12. The package of claim 1 , further comprising at least one heat sink on the at least one flip chip.

13. The package of claim 1 , wherein the first encapsulate comprises a same material as the second encapsulate.

14. The package of claim 1 , wherein the first encapsulate comprises a different material from the second encapsulate.