IP Library Granted Patent US 7,556,981
Granted Patent B2
US 7,556,981 · App. 11/647,822 · Granted Jul 7, 2009

Switches for shorting during MEMS etch release

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Quick Facts
Patent No.
US 7,556,981
App. No.
11/647,822
Granted
Jul 7, 2009
Kind
B2
Abstract

A MEMS (Microelectromechanical system) device is described. The device includes a first layer on a substrate, and a sacrificial layer on or over the first layer, the first sacrificial layer being configured to be removed in a removal procedure. The device also includes a second layer on or over the first sacrificial layer, where the second layer is spaced apart from the first layer, and a shorting element electrically connecting the first and second layers, where at least a portion of the shorting element is removable in the removal procedure.

Claims (29)

1. A method of manufacturing a MEMS (microelectromechanical system) device, the method comprising:

forming a first layer on a substrate;

forming a sacrificial layer on or over the first layer, the sacrificial layer configured to be removed in a removal procedure;

forming a second layer on or over the first sacrificial layer, wherein the second layer is spaced apart from the first layer; and

forming a shorting element electrically connecting the first and second layers, wherein at least a portion of the shorting element is configured to electrically connect the first and second layers after the sacrificial layer has been removed during the removal procedure, and wherein the shorting element is configured to be removed during the removal procedure.

2. The method of claim 1 , additionally comprising performing the removal procedure.

3. The method of claim 2 , wherein the removal procedure comprises opening the shorting element, wherein the first and second layers become electrically isolated.

4. The method of claim 3 , wherein the first sacrificial layer is removed prior to opening the shorting element.

5. The method of claim 2 , wherein performing the removal procedure comprises substantially simultaneously subjecting the sacrificial layer and the shorting element to one or more common manufacturing steps.

6. The method of claim 2 , wherein performing the removal procedure comprises etching.

7. The method of claim 2 , wherein forming the shorting element comprises forming a second sacrificial layer, and wherein the removal procedure comprises etching at least one of the first and second sacrificial layers.

8. The method of claim 7 , wherein at least part of the first and second sacrificial layers are formed simultaneously.

9. The method of claim 1 , further comprising forming an interferometric light modulation cavity between the first and second layers.

10. The method of claim 1 , wherein the substrate comprises glass.

11. The method of claim 1 , wherein the shorting element comprises at least one of molybdenum, tungsten, and titanium.

12. The method of claim 1 , wherein the sacrificial layer is configured to be removed with an etchant comprising XeF 2 .

13. The method of claim 1 , further comprising:

forming a first structure comprising the first and second layers, and a first etching agent access passage; and

forming a second structure comprising the shorting element, and a second etching agent access passage, wherein the first etching agent access passage is configured to allow the first sacrificial layer to be removed before the shorting element is opened.

14. The method of claim 1 , wherein removing the sacrificial layer induces electrical charge build-up.

15. A method of manufacturing a MEMS (microelectromechanical system) device, the method comprising:

forming a first layer on a substrate;

forming a sacrificial layer on or over the first layer, the sacrificial layer configured to be removed in a removal procedure;

forming a second layer on or over the first sacrificial layer, wherein the second layer is spaced apart from the first layer;

forming a shorting element electrically connecting the first and second layers, wherein at least a portion of the shorting element is removable in the removal procedure;

forming an array of MEMS elements, the array comprising a plurality of addressing lines;

forming at least one connection pad; and

forming a plurality of switches configured to selectively connect two or more of the addressing lines to the connection pad.

16. The method of claim 15 , further comprising forming one or more of the plurality of switches an area designated for occupation by a driver circuit.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 31, 2016
From: QUALCOMM MEMS TECHNOLOGIES, INC.
To: SNAPTRACK, INC.
Reel/Frame 039891/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 27, 2008
From: QUALCOMM INCORPORATED
To: QUALCOMM MEMS TECHNOLOGIES, INC.
Reel/Frame 020571/0253 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 27, 2007
From: QUALCOMM MEMS TECHNOLOGIES, INC.
To: QUALCOMM INCORPORATED
Reel/Frame 019493/0860 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 29, 2006
From: CUMMINGS, WILLIAM J.
To: QUALCOMM MEMS TECHNOLOGIES, INC.
Reel/Frame 018750/0429 →