Semiconductor device
View Patent ↗A semiconductor device including a substrate having a main surface including a first area, a second area surrounding the first area, and a third area surrounding the second area; a first insulating protective film that is provided in the first area and formed in a shape having no angles; a second insulating protective film provided in the third area; a semiconductor chip that is provided on the first insulating protective film and has a bottom surface facing to the first insulating protective film; and a sealing resin covering the semiconductor chip, wherein the bottom surface of the semiconductor chip covers the first area.
1. A semiconductor device comprising:
a substrate having a main surface including a first area, a second area surrounding the first area, and a third area surrounding the second area, and a back surface opposite to the main surface;
an insulating protective film formed on a part of the first area and excluding the second area and formed on a part of the third area;
a die bonding layer formed on the insulating protective film and a part of the second area of the substrate;
a semiconductor chip formed on the die bonding layer, the die bonding layer having a top surface and a bottom surface opposite to the top surface; and
a sealing resin covering the semiconductor chip,
wherein the semiconductor chip is located over the first area and an outer edge of the semiconductor chip is located over the second area.
2. The semiconductor device according to claim 1 , wherein the semiconductor chip has a first rectangular shape, the first area has a second rectangular shape that is smaller than the first rectangular shape and the second area has a predetermined width.
3. The semiconductor device according to claim 1 , wherein the substrate has a plurality of interconnections locating from the first area to the third area through the second area.
4. The semiconductor device according to claim 3 , wherein the substrate further has a plurality of bonding pads connected to the interconnections.
5. The semiconductor device according to claim 4 , wherein the bonding pads are located on the third area.
6. The semiconductor device according to claim 3 , wherein the substrate further has a plurality of through holes connected to the interconnections.
7. The semiconductor device according to claim 6 , wherein the through holes are located on the first area.
8. The semiconductor device according to claim 1 , wherein the substrate has a plurality of conductive terminals located on the back side of the substrate.
9. The semiconductor device according to claim 1 , wherein the conductive terminals are solder balls.