Integrated III-nitride devices

1. A III-nitride semiconductor device, comprising:

an active III-nitride heterojunction that includes a two dimensional electron gas, said heterojunction comprising a III-nitride channel layer and a III-nitride barrier confinement layer disposed over said III-nitride channel layer;

a conductive substrate supporting said heterojunction;

a first power contact;

a plurality of first power runners connected to said first power contact;

a second power contact;

a plurality of second power runners connected to said second power contact;

a first power electrode coupled to said heterojunction and connected to and extending from one of said first power runners;

a second power electrode coupled to said heterojunction and connected to and extending from one of said second power runners;

a third power electrode disposed between said first and said second power electrodes;

a trench through said heterojunction under said third power electrode, said trench extending through said III-nitride confinement layer and said III-nitride channel layer;

an electrically conductive body inside said trench and electrically connected to said substrate and said third power electrode;

a first gate arrangement between said first power electrode and said third power electrode; and

a second gate arrangement between said second power electrode and said third power electrode;

wherein said first power runners and said second power runners are alternately arranged in an interdigitated pattern.

2. The device of claim 1 , wherein each said gate arrangement includes a gate electrode and a gate dielectric disposed between said gate electrode and said heterojunction.

3. The device of claim 2 , wherein said gate dielectric is comprised either silicon dioxide or silicon nitride.

4. The device of claim 1 , further comprising an implanted region under each gate arrangement to interrupt said two dimensional electron gas.

5. The device of claim 1 , further comprising a III-nitride transition layer over said substrate, and a III-nitride buffer layer between said transition layer and said heterojunction.

6. The device of claim 5 , wherein said substrate is comprised of silicon, said transition layer is comprised of AlN, and said buffer layer is comprised of GaN.

7. The device of claim 1 , wherein said substrate is comprised of silicon.

8. The device of claim 1 , wherein said substrate is comprised of SiC.

9. The device of claim 5 , wherein said trench extends through said buffer layer and said transition layer.

10. The device of claim 9 , wherein said trench is lined with a dielectric.

11. The device of claim 1 , wherein said electrically conductive body is comprised of a metallic body.

12. The device of claim 1 , wherein said confinement layer is coupled to said first and said second power electrodes.

13. The device of claim 1 , wherein said channel layer is comprised of GaN, and said confinement layer is comprised of AlGaN.

14. An enhancement mode III-nitride semiconductor device comprising:

a III-nitride heterojunction that includes a two dimensional electron gas (2DEG), said III-nitride heterojunction comprising a III-nitride channel layer and a III-nitride confinement layer disposed over said III-nitride channel layer;

a conductive substrate supporting said heterojunction;

a power electrode;

a trench through said III-nitride heterojunction under said power electrode, said trench extending through said III-nitride confinement layer and said III-nitride channel layer;

an electrically conductive body inside said trench and electrically connected to said conductive substrate and said power electrode;

at least two gates disposed on each side of said power electrode;

said 2DEG including an interrupted region under each of said at least two gates.

15. The enhancement mode III-nitride semiconductor device of claim 14 , wherein each of said at least two gates includes a gate electrode and a gate dielectric.

16. The enhancement mode III-nitride semiconductor device of claim 15 , wherein said gate dielectric comprises one of silicon dioxide and silicon nitride.

17. The enhancement mode III-nitride semiconductor device of claim 14 , wherein said III-nitride channel layer comprises GaN, and said III-nitride confinement layer comprises AlGaN.

18. The enhancement mode III-nitride semiconductor device of claim 14 , wherein said interrupted region of said 2DEG comprises an implanted region under said at least two gates.

19. The enhancement mode III-nitride semiconductor device of claim 14 , further comprising a recessed portion in said III-nitride confinement layer, said heterojunction conformally disposed on said recessed portion.

20. The enhancement mode III-nitride semiconductor device of claim 19 , wherein said recessed portion comprises said interrupted region of said 2DEG.