IP Library Patent Application 11652588
Patent Application
App. No. 11/652,588

Method and apparatus for processing algorithm steps of multimedia data in parallel processing systems

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Quick Facts
Patent No.
US None
App. No.
11/652,588
Abstract

An efficient method and device for the parallel processing of data variables. A parallel processing array has computing elements configured to process data variables in parallel. An algorithm for a plurality of computing elements of a parallel processor is loaded. The algorithm includes a plurality of processing steps. Each of the plurality of computing elements is configured to process a data variable associated with the computing element. Selection codes for the plurality of computing elements of the parallel processor are loaded, wherein the selection codes identify which of the algorithm steps are to be applied by the computing elements to the data variables. The algorithm processing steps are applied to the data variables by the computing elements, wherein for each computing element, only those processing steps identified by the selection codes are applied to the data variable.

Claims (20)

1 . In a parallel processing array having computing elements configured to process data variables in parallel, the method comprising:

loading an algorithm for a plurality of computing elements of a parallel processor, wherein the algorithm includes a plurality of processing steps, and wherein each of the plurality of computing elements is configured to process a data variable associated with the computing element;

loading selection codes for the plurality of computing elements of the parallel processor, wherein the selection codes identify which of the algorithm steps are to be applied by the computing elements to the data variables; and

applying the algorithm processing steps to the data variables by the computing elements, wherein for each computing element, only those processing steps identified by the selection codes are applied to the data variable.

2 . The method of claim 1 , wherein for each of the computing elements:

each of the processing steps has a selection code associated therewith that determines whether or not the processing step is applied to the data variable.

3 . The method of claim 1 , wherein each of the processing steps has a selection code associated therewith that determines which if any of the computer elements apply the processing step to any of the data variables.

4 . The method of claim 1 , wherein the processing steps include numerical additions and data shifting.

5 . The method of claim 1 , wherein the loading of the algorithm includes loading the algorithm into a memory that is shared among the plurality of computing elements.

6 . The method of claim 1 , wherein the loading of the algorithm includes loading the algorithm into a plurality of memories, wherein each of the plurality of memories is associated with one of the computing elements.

7 . A computer readable medium having computer executable instructions thereon for a method of processing in a parallel processing array having computing elements configured to process data variables in parallel, the method comprising:

loading an algorithm for a plurality of computing elements of a parallel processor, wherein the algorithm includes a plurality of processing steps, and wherein each of the plurality of computing elements is configured to process a data variable associated with the computing element;

loading selection codes for the plurality of computing elements of the parallel processor, wherein the selection codes identify which of the algorithm steps are to be applied by the computing elements to the data variables; and

applying the algorithm processing steps to the data variables by the computing elements, wherein for each computing element, only those processing steps identified by the selection codes are applied to the data variable.

8 . The computer readable medium of claim 1 , wherein for each of the computing elements:

each of the processing steps has a selection code associated therewith that determines whether or not the processing step is applied to the data variable.

9 . The computer readable medium of claim 1 , wherein each of the processing steps has a selection code associated therewith that determines which if any of the computer elements apply the processing step to any of the data variables.

10 . The computer readable medium of claim 1 , wherein the processing steps include numerical additions and data shifting.

11 . The computer readable medium of claim 1 , wherein the loading of the algorithm includes loading the algorithm into a memory that is shared among the plurality of computing elements.

12 . The computer readable medium of claim 1 , wherein the loading of the algorithm includes loading the algorithm into a plurality of memories, wherein each of the plurality of memories is associated with one of the computing elements.

Assignments (3)
RELEASE Recorded Jun 24, 2009
From: SILICON VALLEY BANK
To: BRIGHTSCALE, INC.
Reel/Frame 022868/0330 →
SECURITY AGREEMENT Recorded Jan 11, 2008
From: BRIGHTSCALE, INC.
To: SILICON VALLEY BANK
Reel/Frame 020353/0462 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 7, 2007
From: MITU, BOGDAN; BIVOLARSKI, LAZAR
To: BRIGHTSCALE, INC.
Reel/Frame 018974/0236 →