IP Library Granted Patent US 8,009,454
Granted Patent B2
US 8,009,454 · App. 11/654,003 · Granted Aug 30, 2011

Resistance random access memory device and a method of manufacturing the same

Assignee: Samsung Electronics Co., Ltd.
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Quick Facts
Patent No.
US 8,009,454
App. No.
11/654,003
Granted
Aug 30, 2011
Kind
B2
Abstract

Provided is a resistance random access memory (RRAM) device and a method of manufacturing the same. A resistance random access memory (RRAM) device may include a lower electrode, a first oxide layer on the lower electrode and storing information using two resistance states, a current control layer made of a second oxide on the first oxide layer and an upper electrode on the current control layer.

Claims (22)

1. A RRAM (resistance random access memory device) device comprising:

a lower electrode;

a first oxide layer on the lower electrode and storing information using two resistance states, wherein the first oxide layer is made of one selected from the group consisting of NiO x , ZrO x , Nb 2 O 5-x , HfO, ZnO, WO 3 , CoO, CuO 2 , and TiO 2 ;

a current control layer made of a second oxide on the first oxide layer; and

an upper electrode on the current control layer,

wherein the current control layer has a resistance within a range between about 10 ohm and about 10 kohm, and

wherein the first oxide layer directly contacts the lower electrode, and the current control layer directly contacts the upper electrode.

2. The RRAM device of claim 1 , wherein the current control layer is made of one of ZnOx and RuOx which are doped with transition metals.

3. The RRAM device of claim 1 , wherein the current control layer is made of a transition metal oxide.

4. The RRAM device of claim 1 , wherein the current control layer is made of one of ZnO and RuOx which are doped with one of Al and In.

5. The RRAM device of claim 1 , wherein the current control layer is made of one of SiO 2 and Zr-rich ZrO 2 which are doped with metals.

6. A method of manufacturing a RRAM (resistance random access memory device) device comprising:

providing a lower electrode;

forming a first oxide layer on the lower electrode and storing information using two resistance states, wherein the first oxide layer is made of one selected from the group consisting of NiO x , ZrO x , Nb 2 O 5-x , HfO, ZnO, WO 3 , CoO, CuO 2 , and TiO 2 ;

forming a current control layer made of a second oxide on the first oxide layer; and

forming an upper electrode on the current control layer,

wherein the current control layer has a resistance within a range between about 10 ohm and about 10 kohm, and

wherein the first oxide layer directly contacts the lower electode, and the current control layer directly contacts the upper electrode.

7. The method of claim 6 , wherein the current control layer is made of one of ZnOx and RuOx which are doped with transition metals.

8. The method of claim 6 , wherein the current control layer is made of a transition metal oxide.

9. The method of claim 6 , wherein the current control layer is made of one of ZnO and RuOx which are doped with one of Al and In.

10. The method of claim 6 , wherein the current control layer is made of one of SiO 2 and Zr-rich ZrO 2 which are doped with metals.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 17, 2007
From: LEE, MYOUNG-JAE; PARK, YOON-DONG; HWANG, HYUN-SANG; LEE, DONG-SOO
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 018808/0248 →
Priority Claims (1)
KR 10-2006-0022728 · Mar 10, 2006 · national
Continuity (1)
Related Publication 20070215977A1 · Sep 20, 2007