Band gap circuit
View Patent ↗Provided is a band gap constant-voltage circuit which is configured by combining a PMOS transistor, an NMOS transistor, a bipolar transistor, and a resistor, and is capable of preventing an output voltage from being stabilized at 0 V immediately after power supply fluctuation. According to the band gap constant-voltage circuit of the present invention, the back-gates of two p-type transistors (P 112 and P 113 ) constituting a differential amplifier are each connected to a node ( 11 ) which is a power source terminal on the positive side of the differential amplifier, and a level shifter circuit is connected to the gate of each of the transistors (P 112 and P 113 ).
1. A band gap circuit having a differential amplifier circuit, comprising:
a pair of PMOS transistors; and
a level shifter circuit, wherein:
the pair of PMOS transistors are connected to each other through source terminals thereof;
the level shifter circuit is connected to a gate of each of the pair of PMOS transistors, the gate being used as an input terminal; and
the pair of PMOS transistors each have a back-gate connected to each of the source terminals,
the band gap circuit further comprising:
a PMOS transistor for supplying the differential amplifier with a constant current; and
another PMOS transistor for constituting another level shifter circuit, wherein the PMOS transistors are connected to each other in cascode.
2. The band gap circuit according to claim 1 , wherein the pair of PMOS transistors are large in size as compared with other PMOS transistors in the band gap circuit.
3. The band gap circuit according to claim 1 , wherein the differential amplifier circuit is formed of a PMOS transistor and an NMOS transistor, the NMOS transistor having a threshold voltage in a range of 0.4 to 0.5 V.