Electrical terminal footprints for a printed circuit board
View Patent ↗In one implementation, a PCB having an array of vias and electrical terminals disposed on the side of the PCB opposite the side configured to receive a grid array package are disclosed herein. The array of vias have pads and forms a pattern of repetitive rows and columns. A substantially consistent intervia distance is defined along an intervia axis between each adjacent via in each of the rows and columns. A pair of electrical terminals are positioned adjacent one another along an electrical terminal axis between at least two of the vias and the electrical terminal axis intersects the intervia axis. In another implementation, a group of four adjacent vias form a substantially rectangular shape having one of four vias positioned at each of four corners of the rectangular shape. One electrical terminal is positioned within the four vias without contacting any of the four vias.
1. A printed circuit board (PCB), comprising:
an array of vias, wherein the array of vias forms a pattern of repetitive rows and columns of vias, wherein intervia distance between each of a plurality of pairs of adjacent vias is substantially constant along all columns and rows; and
a pair of electrical terminals disposed on a first side of the PCB opposite a second side of the PCB configured to receive a grid array package, wherein the pair of electrical terminals are positioned adjacent one another along an electrical terminal axis between two of the adjacent vias, wherein the electrical terminal axis intersects the intervia axis between the pair of electrical terminals;
wherein each of the pair of electrical terminals are spaced apart from each of the intervia axes.
2. The PCB of claim 1 , wherein the pair of electrical terminals comprise two pads shaped and positioned to form mirror images of one another.
3. The PCB of claim 2 , wherein the two pads comprise irregular hexagonal shapes.
4. The PCB of claim 1 , wherein each electrical terminal has a surface designed to receive an electrical component thereon to electrically couple the pair of electrical terminals.
5. The PCB of claim 4 , wherein the electrical component comprises at least one of a resistor, capacitor, or inductor.
6. The PCB of claim 4 , wherein the electrical component comprises at least one decoupling capacitor.
7. The PCB of claim 4 , wherein the intervia distance is defined by a 1 mm pitch and the electrical component comprises one or more 0402 decoupling capacitors.
8. The PCB of claim 7 , wherein a minimum distance of 0.14 mm separates the 0402 decoupling capacitors from any adjacent via.
9. The PCB of claim 1 , wherein the electrical terminal axis is positioned perpendicularly to the intervia axis.
10. The PCB of claim 1 , wherein the grid array package comprises a ball grid array (BGA).
11. The PCB of claim 1 , wherein each of the vias comprises a pad on the first side of the PCB.
12. A PCB according to claim 1 , wherein the intervia distance is determined based on electrical tolerances of the vias.
13. A printed circuit board (PCB), comprising:
an array of vias having respective pads thereon on a first side of the PCB configured to receive a grid array package, and second pads thereon on a second side of the PCB opposite the first side of the PCB, wherein the array of vias forms a pattern of repetitive rows and columns of vias, wherein intervia distance between each of a plurality of pairs of adjacent vias is substantially constant along all columns and rows; and
a pair of electrical terminals disposed on the second side of the PCB, wherein the pair of electrical terminals is positioned adjacent one another along an electrical terminal axis between two of the adjacent vias, wherein the electrical terminal axis intersects the intervia axis between the pair of electrical terminals;
wherein each of the pair of electrical terminals are spaced apart from each of the intervia axes.
14. The PCB of claim 13 , wherein the pair of electrical terminals comprise two pads shaped and positioned to form mirror images of one another.
15. The PCB of claim 14 , wherein the two pads comprise irregular hexagonal shapes.
16. The PCB of claim 13 , wherein each electrical terminal has a surface designed to receive an electrical component thereon to electrically couple the pair of electrical terminals.
17. The PCB of claim 16 , wherein the electrical component comprises at least one of a resistor, capacitor, or inductor.
18. The PCB of claim 16 , wherein the electrical component comprises at least one decoupling capacitor.
19. The PCB of claim 16 , wherein the intervia distance is defined by a 1 mm pitch and the electrical component comprises one or more 0402 decoupling capacitors.
20. The PCB of claim 19 , wherein a minimum distance of 0.14 mm separates the 0402 decoupling capacitors from any adjacent via.
21. The PCB of claim 13 , wherein the electrical terminal axis is positioned perpendicularly to the intervia axis.
22. The PCB of claim 13 , wherein the grid array package comprises a ball grid array (BGA).
23. A printed circuit board (PCB), comprising:
an array of vias arranged in a grid pattern, wherein intervia axes are defined between adjacent vias along individual rows and columns within the grid pattern, wherein intervia distance between each of a plurality of pairs of adjacent vias is substantially constant along all columns and rows; and
a pair of electrical terminals disposed on a first side of the PCB opposite a second side of the PCB configured to receive a grid array package, wherein the pair of electrical terminals are positioned adjacent one another along an electrical terminal axis between two adjacent vias in a column or a row, wherein the electrical terminal axis intersects the intervia axis at a single point between the pair of electrical terminals;
wherein each of the pair of electrical terminals are spaced apart from each of the intervia axes.
24. A printed circuit board (PCB), comprising:
an array of vias, wherein the array of vias forms a pattern of evenly spaced, repetitive rows and columns of vias, wherein intervia distance between each of a plurality of pairs of adjacent vias is substantially constant along all columns and rows;
a pair of electrical terminals disposed on a first side of the PCB opposite a second side of the PCB configured to receive a grid array package and configured to receive an electrical component for connecting the electrical terminals of the pair of the electrical terminals along an electrical terminal axis between two adjacent vias in a column or a row, wherein the pair of electrical terminals are positioned adjacent one another and between two adjacent vias in a column or a row, and wherein the electrical terminal axis intersects the intervia axis at a single point between the pair of electrical terminals;
wherein each of the pair of electrical terminals are spaced apart from each of the intervia axes.