Plasma display panel driving circuit and plasma display apparatus
View Patent ↗A plasma display panel driving circuit for driving a plasma display panel which has a plurality of scan electrodes and sustain electrodes and operates as a capacitive load, by applying a different waveform in each of a reset period, address period and sustain period, includes a voltage multiplying circuit having a first input terminal to which 0 or a first voltage is inputted and a second input terminal to which a second voltage that is smaller than the first voltage is inputted. The voltage multiplying circuit is operable to generate a voltage prepared by adding the second voltage to a voltage equivalent to integral multiple of the first voltage.
1. A plasma display panel driving circuit for driving a plasma display panel which has a plurality of scan electrodes and sustain electrodes and operates as a capacitive load, by applying a different waveform in each of a reset period, address period and sustain period, comprising:
a voltage multiplying circuit having a first input terminal to which 0 or a first voltage is inputted and a second input terminal to which a second voltage that is smaller than the first voltage is inputted,
wherein the voltage multiplying circuit is operable to generate a voltage prepared by adding the second voltage to a voltage equivalent to and integral multiple of the first voltage.
2. The plasma display panel driving circuit according to claim 1 , further comprising a sustain pulse generating circuit which is a circuit including a dc power supply and generating a voltage waveform to be applied to the scan electrodes during the sustain period based upon the output voltage of the dc power supply,
the sustain pulse generating circuit further including a power recovery section that recovers power accumulated in the capacitive load into a recovery capacitor by LC resonance and reuses the recovered power for driving the scan electrode,
wherein the second input terminal of the voltage multiplying circuit is connected to one end of the recovery capacitor.
3. The plasma display panel driving circuit according to claim 1 , further comprising a reset waveform generating circuit that generates a reset waveform to be applied to the scan electrode during the reset period,
wherein the voltage generated by the voltage multiplying circuit is applied to the reset waveform generating circuit.
4. The plasma display panel driving circuit according to claim 1 , wherein the voltage multiplying circuit includes:
a first diode having an anode connected to the recovery capacitor;
a second diode having an anode connected to the cathode of the first diode;
a first pump-up capacitor having one end connected to the cathode of the first diode, and the other end to which either one of a predetermined voltage and the grounding potential can be selectively applied;
a charging capacitor having one end connected to the cathode of the second diode, and the other end connected to the grounding potential;
a third diode having an anode connected to the cathode of the second diode; and
a second pump-up capacitor having one end connected to the cathode of the third diode and the other end to which either one of a predetermined voltage and the grounding potential can be selectively applied.
5. A plasma display apparatus comprising:
a plasma display panel; and
the plasma display panel driving circuit according to claim 1 which drives the plasma display panel.
6. The plasma display apparatus according to claim 5 , wherein the plasma display panel driving circuit further comprises a sustain pulse generating circuit which is a circuit including a dc power supply and generating a voltage waveform to be applied to the scan electrode during the sustain period based upon the output voltage of the dc power supply,
the sustain pulse generating circuit further includes a power recovery section that recovers power accumulated in the capacitive load into a recovery capacitor by LC resonance and reuses the recovered power for driving the scan electrode, and
the second input terminal of the voltage multiplying circuit is connected to one end of the recovery capacitor.
7. The plasma display apparatus according to claim 5 , wherein the plasma display panel driving circuit further comprises a reset waveform generating circuit that generates a reset waveform to be applied to the scan electrode during the reset period,
wherein the voltage generated by the voltage multiplying circuit is applied to the reset waveform generating circuit.
8. The plasma display apparatus according to claim 5 , wherein the voltage multiplying circuit includes:
a first diode having an anode connected to the recovery capacitor;
a second diode having an anode connected to the cathode of the first diode;
a first pump-up capacitor having one end connected to the cathode of the first diode, and the other end to which either one of a predetermined voltage and the grounding potential can be selectively applied;
a charging capacitor having one end connected to the cathode of the second diode, and the other end connected to the grounding potential;
a third diode having an anode connected to the cathode of the second diode; and
a second pump-up capacitor having one end connected to the cathode of the third diode and the other end to which either one of a predetermined voltage and the grounding potential can be selectively applied.