IP Library Granted Patent US 7,482,865
Granted Patent B2
US 7,482,865 · App. 11/672,331 · Granted Jan 27, 2009

Systems and methods for correcting errors resulting from component mismatch in a feedback path

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Quick Facts
Patent No.
US 7,482,865
App. No.
11/672,331
Granted
Jan 27, 2009
Kind
B2
Abstract

Systems and methods for minimizing performance degradation due to component mismatch in the feedback path of a digital PWM amplifier feedback loop. One embodiment comprises a digital pulse width modulated (PWM) amplifier with feedback. The amplification subsystem receives a digital audio signal and produces an analog output signal. The feedback loop produces a feedback signal based on the filtered analog output signal and modifies the digital audio signal based on the feedback signal. The feedback loop includes a filter configured to filter the analog output signal and correction circuitry configured to correct component mismatch errors introduced by the filter. In one embodiment, the correction circuitry receives a measurement of a power supply voltage, multiplies the measured voltage by a gain and adds the scaled measurement to the feedback signal to correct for the component mismatch errors.

Claims (40)

1. A digital PWM amplifier comprising:

an amplification subsystem configured to receive a digital audio signal and to produce an analog output signal; and

a feedback loop configured to produce a feedback signal based on the filtered analog output signal and to modify the digital audio signal based on the feedback signal;

wherein the feedback loop includes a filter configured to filter the analog output signal; and

wherein the feedback loop includes correction circuitry configured to correct component mismatch errors introduced by the filter.

2. The digital PWM amplifier of claim 1 , further comprising a power supply configured to power the amplification subsystem, wherein the correction circuitry is configured to add a correction signal to the feedback signal, wherein the correction signal is proportional to a voltage of the power supply.

3. The digital PWM amplifier of claim 2 , wherein the correction circuitry includes an analog-to-digital converter (ADC) configured to digitize the voltage of the power supply.

4. The digital PWM amplifier of claim 3 , wherein the correction circuitry includes a decimator configured to decimate the digitized voltage of the power supply.

5. The digital PWM amplifier of claim 4 , further comprising a multiplier configured to scale the voltage of the power supply by a gain factor.

6. The digital PWM amplifier of claim 1 , wherein the feedback loop further comprises an analog-to-digital converter (ADC) configured to digitize the filtered analog output signal produced by the filter.

7. The digital PWM amplifier of claim 6 , wherein the feedback loop further comprises a decimator configured to decimate the digitized output signal.

8. The digital PWM amplifier of claim 7 , further comprising a multiplier configured to scale the digitized output signal by a gain factor.

9. The digital PWM amplifier of claim 1 , wherein the amplification subsystem comprises a pair of half-bridge output stages in a full-bridge configuration, and wherein the analog output signal comprises a difference between a first output of a first one of the half-bridge output stages and a second output of a second one of the half-bridge output stages.

10. The digital PWM amplifier of claim 1 , wherein the amplification subsystem comprises a non-linearity correction unit configured to correct the digital audio signal for non-linearities caused by conversion of the digital audio signal to a PWM signal.

11. The digital PWM amplifier of claim 1 , further comprising a pair of PWM modulators configured to generate PWM waveforms based on the digital audio signal.

12. The digital PWM amplifier of claim 11 , further comprising a pair of half-bridge output stages, wherein each of the half-bridge output stages is coupled to one of the PWM modulators and configured to generate an analog output signal based on the received PWM waveform.

13. The digital PWM amplifier of claim 12 , wherein the half-bridge output stages are configured in a full-bridge topology, wherein the analog output signal produced by one of the half-bridge output stages is supplied to a positive terminal of a load and the analog output signal produced by the other of the half-bridge output stages is supplied to a negative terminal of the load.

14. The digital PWM amplifier of claim 13 , wherein the load is a loudspeaker.

15. A method implemented in a digital pulse width modulated (PWM) amplifier, wherein the amplifier includes a feedback loop, the method comprising:

producing an analog output signal based on a digital audio signal;

filtering the analog output signal to produce a feedback signal;

providing a power supply measurement;

scaling the power supply measurement; and

adding the scaled power supply measurement to the feedback signal to reduce component mismatch errors in the feedback signal.

16. The method of claim 15 , wherein producing the analog output signal based on the digital audio signal comprises:

receiving the digital audio signal;

performing PWM non-linearity correction on the digital audio signal;

adding the feedback signal with the scaled power supply measurement to the digital audio signal;

quantizing the digital audio signal;

performing noise shaping on the quantized digital audio signal;

generating one or more PWM waveforms based on the quantized digital audio signal; and

generating one or more analog output audio signals based on the PWM waveforms.

17. The method of claim 15 , further comprising digitizing the feedback signal and the power supply measurement before adding the scaled power supply measurement to the feedback signal.

18. The method of claim 17 , further comprising decimating the digitized feedback signal and the digitized power supply measurement before adding the scaled power supply measurement to the feedback signal.

19. The method of claim 15 , further comprising determining a power supply gain for scaling the power supply measurement.

20. The method of claim 19 , wherein determining the gain comprises:

providing an input tone to the amplifier;

selecting a feedback loop gain at which an output amplitude with the feedback loop open is approximately equal to an output amplitude with the feedback loop closed;

closing the feedback loop; and

selecting a power supply gain at which a measured value of total harmonic distortion plus noise is minimized.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 18, 2014
From: D2AUDIO LLC
To: INTERSIL AMERICAS LLC
Reel/Frame 032467/0775 →
CHANGE OF NAME Recorded Mar 18, 2014
From: D2AUDIO CORPORATION
To: D2AUDIO LLC
Reel/Frame 032469/0691 →
SECURITY AGREEMENT Recorded May 5, 2010
From: INTERSIL CORPORATION; TECHWELL, INC.; INTERSIL COMMUNICATIONS, INC.; QUELLAN, INC.; ZILKER LABS, INC.; KENET, INC.; INTERSIL AMERICAS INC.; ELANTEC SEMICONDUCTOR, INC.; D2AUDIO CORPORATION; PLANET ATE, INC.
To: MORGAN STANLEY & CO. INCORPORATED
Reel/Frame 024337/0395 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 20, 2007
From: KOST, MICHAEL A.; ANDERSON, JACK B.; CHIENG, DANIEL L.W.
To: D2AUDIO CORPORATION
Reel/Frame 019039/0211 →