Integrated fault output/fault response delay circuit
View Patent ↗A time delay fault device includes an integrated circuit (IC) having an electronic circuit having a fault indicator signal output and a time delay circuit having an input connected to the fault indicator signal output and an output to provide a delayed fault indicator signal output, the time delay circuit being responsive to an external voltage from a resistor capacitor network coupled to the delayed fault indicator signal output to set the time delay of the delayed fault indicator signal.
1. A time delay fault device comprising:
an integrated circuit (IC) comprising:
an electronic circuit having a fault indicator signal output;
a time delay circuit having an input connected to the fault indicator signal output and an output to provide a delayed fault indicator signal output wherein the time delay circuit is responsive to an external reference signal from a resistor capacitor network coupled to the delayed fault indicator signal output to set the time delay of the delayed fault indicator signal.
2. The time delay fault device as recited in claim 1 wherein the time delay circuit comprises:
a fixed current source to ground that toggles with an internal fault signal;
a field effect transistor having a gate, a drain connected to ground, and a source connected to the output of the time delay circuit;
a latch having an input and a switchable output connected to the gate of the field effect transistor; and
a comparator having an output connected the input of the latch and a first and a second input, the first input connected to an internal reference signal and the second input connected to the output of the time delay circuit.
3. The time delay fault device as recited in claim 2 further comprising:
a resistor capacitor network external to the integrated circuit comprising a capacitor connected in series with a resistor to complete the time delay circuit.
4. A time delay fault device comprising:
an integrated circuit (IC) comprising:
an electronic circuit having a fault indicator signal output;
a time delay circuit having an input connected to the fault indicator signal output and an output to provide a delayed fault indicator signal output, wherein the time delay circuit is responsive to an external reference signal from a resistor capacitor network coupled to the delayed fault indicator signal output to set the time delay of the delayed fault indicator signal, the time delay circuit comprising:
a fixed current source to ground that toggles with an internal fault signal;
a field effect transistor having a gate, a drain connected to ground, and a source connected to the output of the time delay circuit;
a latch having an input and a switchable output connected to the gate of the field effect transistor;
a comparator having an output connected the input of the latch and a first and a second input, the first input connected to an internal reference signal and the second input connected to the output of the time delay circuit.
5. The time delay fault device as recited in claim 4 comprising a resistor capacitor network external to the integrated circuit comprising a capacitor connected in series with a resistor to complete the time delay circuit.
6. A time delay fault device comprising:
an integrated circuit (IC) comprising:
an electronic circuit having a fault indicator signal output;
a time delay circuit having an input connected to the fault indicator signal output and an output to provide a delayed fault indicator signal output, wherein the time delay circuit is responsive to an external reference signal from a resistor capacitor network coupled to the delayed fault indicator signal output to set the time delay of the delayed fault indicator signal, the time delay circuit comprising:
a fixed current source to ground that toggles with an internal fault signal;
a field effect transistor having a gate, a drain connected to ground, and a source connected to the output of the time delay circuit;
a latch having an input and a switchable output connected to the gate of the field effect transistor;
a comparator having an output connected the input of the latch and a first and a second input, the first input connected to an internal reference signal and the second input connected to the output of the time delay circuit; and
a resistor capacitor network external to the integrated circuit comprising a capacitor connected in series with a resistor to complete the time delay circuit.