Semiconductor device and method of manufacturing the same
View Patent ↗A method of manufacturing a semiconductor device includes: (A) a wafer process; and (B) a bias application process after the wafer process. The wafer process includes: (a) forming a n-type well in a p-type semiconductor substrate; (b) forming a p-type well in the n-type well; and (c) forming a transistor on the p-type well, the transistor having a n-type source/drain diffusion layer. In the bias application process, a forward bias is applied between the p-type well and the n-type well to move heavy metal ions.
1. A method of manufacturing a semiconductor device comprising:
forming a n-type well in a p-type semiconductor substrate;
forming a p-type well in said n-type well;
forming a transistor on said p-type well, said transistor having a n-type source/drain diffusion layer; and
applying a forward bias between said p-type well and said n-type well to remove heavy metal ions from a p-n junction between said p-type well and said n-type well, formed during at least one of the forming of the n-type well, the forming of the p-type well, and the forming of the transistor.
2. The method according to claim 1 , further comprising:
applying a reverse bias between said p-type well and said n-type source/drain diffusion layer.
3. The method according to claim 2 ,
wherein removal of said heavy metal ions comprises transferring said heavy metal ions from said n-type source/drain diffusion layer to said p-type well by applying said reverse bias.
4. The method according to claim 1 , further comprising: applying a reverse bias between said p-type semiconductor substrate and said n-type well.
5. The method according to claim 4 ,
wherein removal of said heavy metal ions comprises transferring said heavy metal ions from said n-type well to said p-type semiconductor substrate by applying said reverse bias.
6. The method according to claim 1 , further comprising:
applying a reverse bias between said p-type well and said n-type source/drain diffusion layer; and
applying a reverse bias between said p-type semiconductor substrate and said n-type well.
7. The method according to claim 6 ,
wherein removal of said heavy metal ions comprises transferring said heavy metal ions from said n-type source/drain diffusion layer to said p-type semiconductor substrate by applying said forward bias and said reverse bias.
8. The method according to claim 1 , further comprising:
inspecting circuit characteristics of the semiconductor device after applying the forward bias between said p-type well and said n-type well.
9. The method according to claim 1 ,
wherein said creation of the semiconductor device further includes: forming a heavy metal gettering site in at least one of said p-type semiconductor substrate and a p-type well.
10. The method according to claim 9 , further comprising:
applying a reverse bias between said p-type well and said n-type source/drain diffusion layer.
11. The method according to claim 10 ,
wherein removal of said heavy metal ions comprises transferring said heavy metal ions from said n-type source/drain diffusion layer to said p-type well by applying said reverse bias.
12. The method according to claim 9 , further comprising: applying a reverse bias between said p-type semiconductor substrate and said n-type well.
13. The method according to claim 12 ,
wherein removal of said heavy metal ions comprises transferring said heavy metal ions from said n-type well to said p-type semiconductor substrate by applying said reverse bias.
14. The method according to claim 9 , further comprising:
applying a reverse bias between said p-type well and said n-type source/drain diffusion layer; and
applying a reverse bias between said p-type semiconductor substrate and said n-type well.
15. The method according to claim 14 ,
wherein removal of said heavy metal ions comprises transferring said heavy metal ions from said n-type source/drain diffusion layer to said p-type semiconductor substrate by applying said forward bias and said reverse bias.
16. The method according to claim 9 , further comprising:
inspecting circuit characteristics of the semiconductor device after applying the forward bias between said p-type well and said n-type well.
17. The method according to claim 1 ,
wherein removal of said heavy metal ions comprises transferring said heavy metal ions from said p-type well to said n-type well by applying said forward bias.
18. A method of manufacturing a semiconductor device in a semiconductor wafer comprising:
forming a n-type well in a p-type semiconductor substrate within said semiconductor wafer;
forming a p-type well in said n-type well;
forming a transistor on said p-type well, said transistor having a n-type source/drain diffusion layer;
inspecting circuit characteristics of the semiconductor device;
dicing said semiconductor wafer to produce a semiconductor chip and packaging said semiconductor chip; and
inspecting circuit characteristics of said semiconductor chip,
wherein a forward bias between said p-type well and said n-type well to remove heavy metal ions from a p-n junction between said p-type well and said n-type well, formed during at least one of the forming of the n-type well, the forming of the p-type well, and the forming of the transistor, is applied at, at least one of, a time between said formation of the semiconductor device and inspection of the circuit characteristics of the semiconductor device, a time when dicing said semiconductor wafer, and a time between dicing said semiconductor wafer and inspecting circuit characteristics of said semiconductor chip.
19. The method according to claim 18 ,
wherein removal of said heavy metal ions comprises transferring said heavy metal ions from said p-type well to said n-type well by applying said forward bias.