Flat panel display manufacturing

1. A method comprising:

exposing a photo-resist layer using a first photomask and a first exposure machine that has a first resolution to cause the photo-resist layer to have an exposed portion and an un-exposed portion, the first photomask having a first pattern; and

exposing the photo-resist layer using a second photomask and a second exposure machine that has a second resolution to further expose the un-exposed portion of the photo-resist layer, the first resolution being different from the second resolution, the second photomask having a second pattern, the second pattern being a subset of the first pattern.

2. The method of claim 1 wherein the second resolution is higher than the first resolution.

3. The method of claim 1 wherein exposing the photo-resist layer using the first exposure machine comprises using the first exposure machine to process a larger area of the photo-resist layer per unit of time than using the second exposure machine to process the photo-resist layer.

4. The method of claim 1 wherein the first exposure machine is configured to define lines having widths not smaller than 5 μm, and the second exposure machine is configured to define lines having widths smaller than 5 μm.

5. The method of claim 1 , further comprising developing the photo-resist layer after exposing the photo-resist layer using the first exposure machine to cause the photo-resist layer to have a first pattern comprising an alignment mark.

6. The method of claim 5 , further comprising developing the photo-resist layer after exposing the photo-resist layer using the second exposure machine to cause the developed photo-resist layer to have a second pattern.

7. The method of claim 1 in which the first exposure machine comprises a proximity exposure machine.

8. The method of claim 1 in which the second exposure machine comprises at least one of a scanner exposure machine, a stepper exposure machine, and a beam writing machine.

9. The method of claim 1 in which all of opaque regions of the second photomask correspond to a subset of opaque regions of the first photomask.

10. The method of claim 9 in which the second photomask has a transparent region that corresponds to an opaque region in the first photomask, and a width of the transparent region corresponds to a channel length of a transistor that is fabricated using the first and second photomasks.

11. A method comprising:

processing a photo-resist layer using a first photo-mask and a first exposure machine to cause the photo-resist layer to have an exposed portion and an un-exposed portion, the un-exposed portion having a first pattern; and

processing the photo-resist layer using a second photomask and a second exposure machine to further expose the photo-resist layer to cause the un-exposed portion to have a second pattern, in which features of the first pattern have a first minimum dimension, features of the second pattern have a second minimum dimension that is different from the first minimum dimension; and the second photomask has a pattern that is a subset of the pattern of the first photomask.

12. The method of claim 11 , wherein the second minimum dimension is smaller than the first minimum dimension.

13. The method of claim 11 , further comprising developing the photo-resist layer and etching a metal layer using a remaining portion of the photo-resist layer as an etching mask to form electrodes of a transistor.

14. The method of claim 13 in which the first pattern defines widths of the electrodes, and a spacing in the second pattern defines a spacing between a first one of the electrodes and a second one of the electrodes.

15. The method of claim 11 in which using the first exposure machine comprises using a proximity exposure machine.

16. The method of claim 11 in which using the second exposure machine comprises using at least one of a scanner exposure machine, a proximity exposure machine, and a beam writing machine.

17. The method of claim 11 in which all of opaque regions of the second photomask correspond to a subset of opaque regions of the first photomask.

18. The method of claim 17 in which the second photomask has a transparent region that corresponds to an opaque region in the first photomask, and a width of the transparent region corresponds to a channel length of a transistor that is fabricated using the first and second photomasks.

19. A method comprising:

using a first exposure machine and a first photomask to define a first geometric feature of a photo-resist layer on a substrate of a display, the first geometric feature being associated with a width of a metal data line of the display, the first photomask having a first pattern; and

using a second exposure machine and a second photomask to define a second geometric feature of the same photo-resist layer, the second geometric feature being associated with a spacing between a source electrode and a drain electrode of a transistor of the display, the second photomask having a second pattern, the second pattern being a subset of the first pattern.

20. The method of claim 19 in which all of opaque regions of the second photomask correspond to a subset of opaque regions of the first photomask.

21. The method of claim 20 in which the second photomask has a transparent region that corresponds to an opaque region in the first photomask, and a width of the transparent region corresponds to the spacing between the source and drain electrodes.