IP Library Granted Patent US 7,847,315
Granted Patent B2
US 7,847,315 · App. 11/684,261 · Granted Dec 7, 2010

High efficiency rectifier

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,847,315
App. No.
11/684,261
Granted
Dec 7, 2010
Kind
B2
Abstract

A high-efficiency power semiconductor rectifier device ( 10 ) comprising a δP++ layer ( 12 ), a P-body ( 14 ), an N-drift region ( 16 ), an N+ substrate ( 18 ), an anode ( 20 ), and a cathode ( 22 ). The method of fabricating the device ( 10 ) comprises the steps of depositing the N-drift region ( 16 ) on the N+ substrate ( 18 ), implanting boron into the N-drift region ( 16 ) to create a P-body region ( 14 ), forming a layer of titanium silicide ( 56 ) on the P-body region ( 14 ), and concentrating a portion of the implanted boron at the interface region between the layer of titanium silicide ( 56 ) and the P-body region ( 14 ) to create the δP++ layer ( 12 ) of supersaturated P-doped silicon.

Claims (12)

1. A two-terminal semiconductor rectifier device comprising:

a δP++ layer;

a P-body located substantially below and adjacent to the δP++ layer;

an N-drift region located substantially below and adjacent to the P-body region;

an N+ substrate located substantially below the N-drift region;

a region of higher-order silicide located substantially above and adjacent to the δP++ layer;

a layer of oxide functioning as a gate dielectric located substantially above and adjacent to one or more of the N-drift region, the P-body, the δP++ layer, and the region of titanium silicide;

a layer of polysilicon located substantially above and adjacent to the layer of oxide; and

a layer of titanium located substantially above and adjacent to the layer of polysilicon.

2. The semiconductor rectifier device as set forth in claim 1 , wherein the titanium has a thickness of approximately 300 Å.

3. The semiconductor rectifier device as set forth in claim 1 , further including a layer of titanium nitride located substantially above and adjacent to the layer of titanium.

4. The semiconductor rectifier device as set forth in claim 2 , wherein the layer of titanium nitride has a thickness of approximately 500 Å.

Assignments (4)
SECURITY AGREEMENT Recorded May 21, 2018
From: DIODES INCORPORATED
To: BANK OF AMERICA, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 046871/0411 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 30, 2018
From: DIODES FABTECH, INC.
To: DIODES INCORPORATED
Reel/Frame 045395/0905 →
SECURITY AGREEMENT Recorded Jan 9, 2013
From: DIODES FABTECH INC., AS GRANTOR
To: BANK OF AMERICA, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 029594/0139 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 10, 2007
From: HAMERSKI, ROMAN J.; CHEN, ZERUI; HONG, JAMES MAN-FAI; CHIEM, JOHNNY DUC VAN; HRUSKA, CHRISTOPHER D.; EASTMAN, TIMOTHY S.
To: DIODES FABTECH INC.
Reel/Frame 019138/0689 →