Transceiver with cascaded phase-locked loops
View Patent ↗A transceiver comprising a first frequency signal generator for generating a reception frequency signal, and a second frequency signal generator for generating a transmission frequency signal. The first frequency signal generator is coupled to the second frequency signal generator to supply the reception frequency signal to the second frequency signal generator as a reference frequency signal.
1. A transceiver comprising:
a first frequency signal generator that generates a reception frequency signal;
a crystal oscillator coupled to the first frequency signal generator to supply a frequency signal to the latter as a first reference frequency signal; and
a second frequency signal generator that generates a transmission frequency signal,
the first frequency signal generator being coupled to the second frequency signal generator to feed the reception frequency signal to the second frequency signal generator as a reference frequency signal.
2. The transceiver of claim 1 , wherein the second frequency signal generator is a phase-locked loop.
3. The transceiver of claim 1 , wherein the first frequency signal generator is a phase-locked loop.
4. The transceiver of claim 1 , wherein an output of the first frequency signal generator is connected to an input of the second frequency signal generator via a frequency divider to feed the reception frequency signal into the second frequency signal generator as a reference frequency signal.
5. The transceiver of claim 4 , wherein the frequency divider is arranged so that the reference frequency signal is divided down to a frequency between 100 MHz and 300 MHz.
6. The transceiver of claim 1 , wherein the reception frequency signal is a first clock signal for a reception path of the transceiver circuit arrangement.
7. The transceiver of claim 1 , wherein the transmission frequency signal is a second clock signal in a transmission path of the transceiver circuit arrangement.