IP Library Granted Patent US 7,915,702
Granted Patent B2
US 7,915,702 · App. 11/686,573 · Granted Mar 29, 2011

Reduced pixel area image sensor

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Quick Facts
Patent No.
US 7,915,702
App. No.
11/686,573
Granted
Mar 29, 2011
Kind
B2
Abstract

An image sensor that includes a plurality of pixels disposed on a substrate, each pixel includes at least one photosensitive region that collects charges in response to incident light; a charge-to-voltage conversion node for sensing the charge from the at least one photosensitive region and converting the charge to a voltage; an amplifier transistor having a source connected to an output node, having a gate connected to the charge-to-voltage conversion node and having a drain connected to at least a portion of a power supply node; and a reset transistor connecting the output node and the charge-to-voltage conversion node.

Claims (19)

1. An image sensor comprising:

(a) a plurality of pixels disposed on a substrate, at least two adjacent pixels comprising:

(i) at least one photosensitive region that collects charges in response to incident light;

(ii) a charge-to-voltage conversion node for sensing the charge from the at least one photosensitive region and converting the charge to a voltage;

(iii) an amplifier transistor having a source/drain connected to an output node, having a gate connected to the charge-to-voltage conversion node and having a source/drain connected to at least a portion of a power supply node; and

(iv) a reset transistor connecting the output node and the charge-to-voltage conversion node, wherein one pixel includes a sequential spatial order as follows: the charge-to-voltage conversion node, a reset gate of the reset transistor, the output node, the gate of the amplifier transistor and at least a portion of the power supply node and the adjacent pixel includes a sequential spatial order as follows: a remaining portion of the power supply node, the gate of the amplifier transistor, the output node, a reset gate of the reset transistor, and a charge-to-voltage conversion node.

2. The image sensor as in claim 1 , wherein the source/drain of the amplifier transistor in the one pixel is connected to one half or substantially one half of the power supply node.

3. The image sensor as in claim 2 , wherein the source/drain of the amplifier transistor in the adjacent pixel shares substantially the remaining half of the power supply node.

4. The image sensor as in claim 1 , wherein each of the at least two adjacent pixels include at least one a transfer gate for transferring charge from the at least one photosensitive region to the charge-to-voltage conversion node.

5. A camera comprising:

an image sensor comprising:

(a) a plurality of pixels disposed on a substrate, at least two adjacent pixels comprising:

(i) at least one photosensitive region that collects charges in response to incident light;

(ii) a charge-to-voltage conversion node for sensing the charge from the at least one photosensitive region and converting the charge to a voltage;

(iii) an amplifier transistor having a source/drain connected to an output node, having a gate connected to the charge-to-voltage conversion node and having a source/drain connected to at least a portion of a power supply node; and

(iv) a reset transistor connecting the output node and the charge-to-voltage conversion node, wherein one pixel includes a sequential spatial order as follows: the charge-to-voltage conversion node, a reset gate of the reset transistor, the output node, the gate of the amplifier transistor and at least a portion of the power supply node and the adjacent pixel includes a sequential spatial order as follows: a remaining portion of the power supply node, the gate of the amplifier transistor, the output node, a reset gate of the reset transistor, and a charge-to-voltage conversion node.

6. The camera as in claim 5 , wherein the source/drain of the amplifier transistor in the one pixel is connected to one half or substantially one half of the power supply node.

7. The camera as in claim 6 , wherein the source/drain of the amplifier transistor in the adjacent pixel shares substantially the remaining half of the power supply node.

8. The camera as in claim 5 , wherein each of the at least two adjacent pixels include at least one a transfer gate for transferring charge from the at least one photosensitive region to the charge-to-voltage conversion node.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 5, 2011
From: EASTMAN KODAK COMPANY
To: OMNIVISION TECHNOLOGIES, INC.
Reel/Frame 026227/0213 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 15, 2007
From: PARKS, CHRISTOPHER
To: EASTMAN KODAK COMPANY
Reel/Frame 019017/0968 →