IP Library Granted Patent US 7,449,976
Granted Patent B1
US 7,449,976 · App. 11/686,817 · Granted Nov 11, 2008

Power efficient PIN attenuator drive circuit

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Quick Facts
Patent No.
US 7,449,976
App. No.
11/686,817
Granted
Nov 11, 2008
Kind
B1
Abstract

An attenuator circuit ( 10 ) having two or more branch circuits ( 12 a to 12 e ) has inputs ( 14 a to 14 e ) for the branch circuits ( 12 a to 12 e ) being connected essentially in parallel arrangement to an input port ( 20 ) for the attenuator circuit ( 10 ). Each branch circuit ( 12 a to 12 e ) includes one or more bipolar transistors ( 32 a to 32 e ) having a collector element receiving a signal from a power supply ( 24 ) through at least one RF positive-intrinsic-negative (PIN) diode ( 50 a - 50 d ) that a control circuit ( 24 ) is controlling. At least one resistive element ( 16 a ) couples an input ( 14 b ) of a second ( 12 b ) of the plurality of branch circuits ( 12 a to 12 e ) from the input port ( 20 ) to the branch circuits ( 12 a to 12 e ). Thus, each branch ( 12 a to 12 e ) of the attenuator circuit ( 10 ) draws current from a low voltage power supply ( 24 ) while still providing for sequential biasing of successive branches and linearization of overall control characteristics.

Claims (16)

1. An attenuator control circuit having two or more branch circuits comprising:

inputs for the branch circuits being connected essentially in parallel arrangement to an input port for the attenuator circuit;

each branch circuit includes one or more transistors receiving a signal from a power supply through at least one RF positive-intrinsic-negative (PIN) diodes that a control circuit is controlling; and,

at least one resistive element couples an input of a second of the plurality of branch circuits from the input port to the branch circuits;

whereby each branch of the attenuator circuit draws current from a low voltage power supply to minimize DC power consumption while still providing for sequenced biasing of successive branches and linearization of overall control characteristics.

2. The invention of claim 1 wherein the transistors are of a bipolar type.

3. The invention of claim 1 wherein the resistance element is a discrete resistor.

4. The invention of claim 1 wherein the input port is coupled to a current sink element through a chain of series connected resistive elements.

5. The invention of claim 1 further including resistive elements coupled in emitter circuits of the transistor in one or more branches.

6. A method for providing for sequenced biasing of successive branches and linearization of overall control characteristics in an attenuator circuit comprising:

providing an input signal through an input port to a plurality of branch circuits being connected essentially in parallel arrangement, each branch circuit includes one or more transistors receiving a signal from a power supply through at least one RF positive-intrinsic-negative (PIN) diodes that a control circuit is controlling; and,

coupling the input port to an input of a second of the plurality of branch circuits through at least one resistive element.

7. The method of claim 6 wherein the transistors are of a bipolar type.

8. The method of claim 6 wherein the resistive element is a discrete resistor.

9. The method of claim 6 wherein the input port is coupled to a current sink element through a chain of series connected resistive elements.

10. The method of claim 6 further including resistive elements coupled in emitter circuits of the transistor in one or more branches.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 7, 2011
From: NORTHROP GRUMMAN CORPORATION
To: NORTHROP GRUMMAN SYSTEMS CORPORATION
Reel/Frame 025597/0505 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 15, 2007
From: WASLO, GEORGE W.
To: NORTHROP GRUMMAN SYSTEMS CORPORATION
Reel/Frame 019020/0930 →