Integrated MIS photosensitive device using continuous films
View Patent ↗An integrated photosensitive device with a metal-insulator-semiconductor (MIS) photodiode constructed with one or more substantially continuous layers of semiconductor material and with a substantially continuous layer of dielectric material.
1. An apparatus including an integrated photosensitive device, comprising:
a substrate; and
a metal-insulator-semiconductor (MIS) photodiode at least a portion of which is disposed over said substrate and comprising
first and second electrodes,
one or more dielectrics at least a portion of at least one of which is disposed between said first and second electrodes, wherein at least one of said one or more dielectric portions comprises a respective at least substantially continuous layer of dielectric material,
one or more semiconductors at least a portion of at least one of which is disposed between one of said one or more dielectrics and one of said first and second electrodes and is in planar contact with said one of said first and second electrodes, wherein at least one of said one or more semiconductor portions comprises a respective at least substantially continuous layer of semiconductor material, and said one of said first and second electrodes comprises a continuous electrode, and
a third electrode a portion of which is disposed, at least in part, in a non-coplanar manner along a peripheral portion of another of said first and second electrodes, wherein said third electrode is electrically insulated from said first and second electrodes, said at least a portion of at least one of said one or more semiconductors is disposed between said one of said first and second electrodes and said third and said another of said first and second electrodes, said another of said first and second electrodes includes a plurality of peripheral edges, said third electrode is disposed in said non-coplanar manner along at least a substantial portion of each of said plurality of peripheral edges thereby defining a pixel region, and said one of said first and second electrodes comprises said continuous electrode throughout said pixel region.
2. The apparatus of claim 1 , further comprising one or more thin film transistors (TFTs) coupled to said MIS photodiode.
3. The apparatus of claim 2 , wherein:
at least one of said one or more TFTs includes a channel region having a thickness; and
at least one of said one or more MIS photodiode semiconductor portions has a thickness greater than said at least one TFT channel region thickness.
4. The apparatus of claim 3 , wherein said at least one of said one or more MIS photodiode semiconductor portions having a thickness greater than said at least one TFT channel region thickness comprises an at least substantially continuous layer of said semiconductor material.
5. The apparatus of claim 2 , wherein at least one of said one or more TFTs is disposed at least substantially between said MIS photodiode and said substrate.
6. The apparatus of claim 1 , wherein at least one of said one or more MIS photodiode semiconductor portions comprises n-type amorphous silicon (a-Si).
7. An apparatus including an integrated photosensitive device, comprising:
a substrate; and
a metal-insulator-semiconductor (MIS) photodiode at least a portion of which is disposed over said substrate and comprising
a plurality of conduction layers including at least first, second and third conduction layers comprising first, second and third films of conductive material, respectively,
one or more insulation layers at least a portion of at least one of which is disposed between said first and second conduction layers, wherein at least one of said one or more insulation layer portions comprises a respective at least substantially continuous film of insulation material, and
one or more semiconductor layers at least a portion of at least one of which is disposed between one of said one or more insulation layers and one of said first and second conduction layers and is in planar contact with said one of said first and second conduction layers, wherein at least one of said one or more semiconductor layer portions comprises a respective at least substantially continuous film of semiconductor material, and said one of said first and second conduction layers comprises a continuous conduction layer,
wherein another of said first and second conduction layers includes a perimeter, said third conduction layer is disposed, at least in part, in a non-coplanar manner along part of said perimeter, said third conduction layer is electrically insulated from said first and second conduction layers, said at least a portion of at least one of said one or more semiconductor layers is disposed between said one of said first and second conduction layers and said third and said another of said first and second conduction layers, said perimeter includes a plurality of peripheral edges, said third conduction layer is disposed in said non-coplanar manner along at least a substantial portion of each of said plurality of peripheral edges thereby defining a pixel region, and said one of said first and second conduction layers comprises said continuous conduction layer throughout said pixel region.
8. The apparatus of claim 7 , further comprising one or more thin film transistors (TFTs) coupled to said MIS photodiode.
9. The apparatus of claim 8 , wherein:
at least one of said one or more TFTs includes a channel region having a thickness; and
at least one of said one or more MIS photodiode semiconductor layer portions has a thickness greater than said at least one TFT channel region thickness.
10. The apparatus of claim 9 , wherein said at least one of said one or more MIS photodiode semiconductor layer portions having a thickness greater than said at least one TFT channel region thickness comprises an at least substantially continuous film of said semiconductor material.
11. The apparatus of claim 8 , wherein at least one of said one or more TFTs is disposed at least substantially between said MIS photodiode and said substrate.
12. The apparatus of claim 7 , wherein at least one of said one or more MIS photodiode semiconductor layer portions comprises n-type amorphous silicon (a-Si).
13. An apparatus including an integrated photosensitive array, comprising:
a substrate; and
a plurality of metal-insulator-semiconductor (MIS) photodiodes at least a portion of which is disposed in an array over said substrate with each one of said at least a portion of said plurality of MIS photodiodes comprising
first and second electrodes,
one or more dielectrics at least a portion of at least one of which is disposed between said first and second electrodes, wherein at least one of said one or more dielectric portions comprises a respective at least substantially continuous layer of dielectric material,
one or more semiconductors at least a portion of at least one of which is disposed between one of said one or more dielectrics and one of said first and second electrodes and is in planar contact with said one of said first and second electrodes, wherein at least one of said one or more semiconductor portions comprises a respective at least substantially continuous layer of semiconductor material, and said one of said first and second electrodes comprises a continuous electrode, and
a third electrode a portion of which is disposed, at least in part, in a non-coplanar manner along a peripheral portion of another of said first and second electrodes, wherein said third electrode is electrically insulated from said first and second electrodes, said at least a portion of at least one of said one or more semiconductors is disposed between said one of said first and second electrodes and said third and said another of said first and second electrodes, said another of said first and second electrodes includes a plurality of peripheral edges, said third electrode is disposed in said non-coplanar manner along at least a substantial portion of each of said plurality of peripheral edges thereby defining a pixel region, and said one of said first and second electrodes comprises said continuous electrode throughout said pixel region.
14. The apparatus of claim 13 , further comprising a plurality of thin film transistors (TFTs) coupled to said plurality of MIS photodiodes.
15. The apparatus of claim 14 , wherein:
each one of at least a portion of said plurality of TFTs includes a respective channel region having a thickness; and
at least one of said one or more MIS photodiode semiconductor portions in each one of said plurality of MIS photodiodes has a thickness greater than a respective one of said plurality of TFT channel region thicknesses.
16. The apparatus of claim 15 , wherein said at least one of said one or more MIS photodiode semiconductor portions in each one of said plurality of MIS photodiodes having a thickness greater than a respective one of said plurality of TFT channel region thicknesses comprises an at least substantially continuous layer of said semiconductor material.
17. The apparatus of claim 14 , wherein each one of at least a portion of said plurality of TFTs is disposed at least substantially between a respective one of said at least a portion of said plurality of said MIS photodiodes and said substrate.
18. The apparatus of claim 13 , wherein at least one of said one or more MIS photodiode semiconductor portions comprises n-type amorphous silicon (a-Si).
19. An apparatus including an integrated photosensitive device, comprising:
a substrate; and
a metal-insulator-semiconductor (MIS) photodiode at least a portion of which is disposed over said substrate and comprising
first and second electrodes,
one or more dielectrics at least a portion of at least one of which is disposed between said first and second electrodes, wherein at least one of said one or more dielectric portions comprises a respective at least substantially continuous layer of dielectric material,
one or more semiconductors at least a portion of at least one of which is disposed between one of said one or more dielectrics and one of said first and second electrodes and is in planar contact with said one of said first and second electrodes, wherein at least one of said one or more semiconductor portions comprises a respective at least substantially continuous layer of semiconductor material, and said one of said first and second electrodes comprises a continuous electrode, and
a third electrode substantially bordering one of said first and second electrodes with a portion of said third electrode disposed, at least in part, in a non-coplanar manner along a peripheral portion of another of said first and second electrodes, wherein said third electrode is electrically insulated from said first and second electrodes, said at least a portion of at least one of said one or more semiconductors is disposed between said one of said first and second electrodes and said third and said another of said first and second electrodes, said another of said first and second electrodes includes a plurality of peripheral edges, said third electrode is disposed in said non-coplanar manner along at least a substantial portion of each of said plurality of peripheral edges thereby defining a pixel region, and said one of said first and second electrodes comprises said continuous electrode throughout said pixel region.
20. An apparatus including an integrated photosensitive device, comprising:
a substrate; and
a metal-insulator-semiconductor (MIS) photodiode at least a portion of which is disposed over said substrate and comprising
first and second electrodes,
one or more dielectrics at least a portion of at least one of which is disposed between said first and second electrodes,
one or more semiconductors at least a portion of at least one of which is disposed between one of said one or more dielectrics and one of said first and second electrodes and is in planar contact with said one of said first and second electrodes, and said one of said first and second electrodes comprises a continuous electrode, and
a third electrode a portion of which is disposed, at least in part, in a non-coplanar manner along a peripheral portion of another of said first and second electrodes, wherein said third electrode is electrically insulated from said first and second electrodes, said at least a portion of at least one of said one or more semiconductors is disposed between said one of said first and second electrodes and said third and said another of said first and second electrodes, said another of said first and second electrodes includes a plurality of peripheral edges, said third electrode is disposed in said non-coplanar manner along at least a substantial portion of each of said plurality of peripheral edges thereby defining a pixel region, and said one of said first and second electrodes comprises said continuous electrode throughout said pixel region.
21. The apparatus of claim 20 , further comprising one or more thin film transistors (TFTs) coupled to said MIS photodiode.
22. The apparatus of claim 21 , wherein:
at least one of said one or more TFTs includes a channel region having a thickness; and
at least one of said one or more MIS photodiode semiconductor portions has a thickness greater than said at least one TFT channel region thickness.
23. The apparatus of claim 21 , wherein at least one of said one or more TFTs is disposed at least substantially between said MIS photodiode and said substrate.
24. The apparatus of claim 20 , wherein at least one of said one or more MIS photodiode semiconductor portions comprises n-type amorphous silicon (a-Si).
25. An apparatus including an integrated photosensitive device, comprising:
a substrate; and
a metal-insulator-semiconductor (MIS) photodiode at least a portion of which is disposed over said substrate and comprising
a plurality of conduction layers including at least first, second and third conduction layers comprising first, second and third films of conductive material, respectively,
one or more insulation layers at least a portion of at least one of which is disposed between said first and second conduction layers, and
one or more semiconductor layers at least a portion of at least one of which is disposed between one of said one or more insulation layers and one of said first and second conduction layers and is in planar contact with said one of said first and second conduction layers, and said one of said first and second conduction layers comprises a continuous conduction layer,
wherein another of said first and second conduction layers includes a perimeter, said third conduction layer is disposed, at least in part, in a non-coplanar manner along part of said perimeter, said third conduction layer is electrically insulated from said first and second conduction layers, said at least a portion of at least one of said one or more semiconductor layers is disposed between said one of said first and second conduction layers and said third and said another of said first and second conduction layers, said perimeter includes a plurality of peripheral edges, said third conduction layer is disposed in said non-coplanar manner along at least a substantial portion of each of said plurality of peripheral edges thereby defining a pixel region, and said one of said first and second conduction layers comprises said continuous conduction layer throughout said pixel region.
26. The apparatus of claim 25 , further comprising one or more thin film transistors (TFTs) coupled to said MIS photodiode.
27. The apparatus of claim 26 , wherein:
at least one of said one or more TFTs includes a channel region having a thickness; and
at least one of said one or more MIS photodiode semiconductor layer portions has a thickness greater than said at least one TFT channel region thickness.
28. The apparatus of claim 26 , wherein at least one of said one or more TFTs is disposed at least substantially between said MIS photodiode and said substrate.
29. The apparatus of claim 25 , wherein at least one of said one or more MIS photodiode semiconductor layer portions comprises n-type amorphous silicon (a-Si).
30. An apparatus including an integrated photosensitive array, comprising:
a substrate; and
a plurality of metal-insulator-semiconductor (MIS) photodiodes at least a portion of which is disposed in an array over said substrate with each one of said at least a portion of said plurality of MIS photodiodes comprising
first and second electrodes,
one or more dielectrics at least a portion of at least one of which is disposed between said first and second electrodes,
one or more semiconductors at least a portion of at least one of which is disposed between one of said one or more dielectrics and one of said first and second electrodes and is in planar contact with said one of said first and second electrodes, and said one of said first and second electrodes comprises a continuous electrode, and
a third electrode a portion of which is disposed, at least in part, in a non-coplanar manner along a peripheral portion of another of said first and second electrodes, wherein said third electrode is electrically insulated from said first and second electrodes, said at least a portion of at least one of said one or more semiconductors is disposed between said one of said first and second electrodes and said third and said another of said first and second electrodes, said another of said first and second electrodes includes a plurality of peripheral edges, said third electrode is disposed in said non-coplanar manner along at least a substantial portion of each of said plurality of peripheral edges thereby defining a pixel region, and said one of said first and second electrodes comprises said continuous electrode throughout said pixel region.
31. The apparatus of claim 30 , further comprising a plurality of thin film transistors (TFTs) coupled to said plurality of MIS photodiodes.
32. The apparatus of claim 31 , wherein:
each one of at least a portion of said plurality of TFTs includes a respective channel region having a thickness; and
at least one of said one or more MIS photodiode semiconductor portions in each one of said plurality of MIS photodiodes has a thickness greater than a respective one of said plurality of TFT channel region thicknesses.
33. The apparatus of claim 31 , wherein each one of at least a portion of said plurality of TFTs is disposed at least substantially between a respective one of said at least a portion of said plurality of said MIS photodiodes and said substrate.
34. The apparatus of claim 30 , wherein at least one of said one or more MIS photodiode semiconductor portions comprises n-type amorphous silicon (a-Si).