Optimized phase change write method
View Patent ↗A method and system of writing data to a phase change random access memory (PCRAM) on an integrated circuit (IC). The method and system includes an array of phase change elements with a plurality of devices providing independent control of a row access and a column access to the PCRAM. A column line (bit line) is pre-charged to a single predetermined level prior to enabling current flow to a corresponding selected phase change element. A current flow in the phase change element with a row (word line) is initiated once the column (bit line) has been pre-charged, to write data to the PCRAM cell. The current flow is terminated in the phase change element by closing the column line (bit line) preferably by quenching.
1. A method of writing data to a phase change random access memory or phase change memory (PCRAM) on an integrated circuit (IC), comprising:
gating an array of phase change elements cells each including a phase change element (PCE) with a plurality of devices providing independent control of a row access and a column access to the PCRAM;
pre-charging a column line (bit line) to a single predetermined level prior to enabling current flow to a corresponding selected phase change element;
initiating a current flow in the phase change element with a row (word line) once the column (bit line) has been pre-charged to write data to the PCRAM cell; and
terminating the current flow in the phase change element by disconnecting the column line (bit line).
2. The method of claim 1 further including quenching the column line (bit line) nearly at the same time as the disconnecting of the column line.
3. The method of claim 2 further including pre-charging a plurality of column lines each to a predetermined level, and terminating the current flow in the phase change element and quenching the bit line independently for each column.
4. The method of claim 2 further including pre-charging a plurality of column lines to multiple independent levels for each column line, and terminating the current flow in the phase change element and quenching the bit line independently for each column.
5. A system for writing data to a phase change random access memory (PCRAM) on an integrated circuit (IC or chip), which comprises:
an array of phase change element (PCE) cells each including a variable resistor, and a plurality of devices providing independent control of a row access and a column access to the PCRAM;
a voltage source coupled to the PCRAM;
the IC directing the voltage source to pre-charge the column line to a predetermined level prior to the IC enabling a current flow to a corresponding selected phase change element;
the IC initiating a current flow in the phase change element with a row (word line) once the column (bit line) has been pre-charged to write data to the PCRAM cell; and
the IC terminating the current flow in the phase change element by disconnecting the column line.
6. The system of claim 5 further including quenching the column line (bit line) nearly at the same time as the disconnecting of the column line.
7. The system of claim 6 wherein the IC includes a control element for directing the voltage source and current flow.
8. The system of claim 6 wherein the voltage source pre-charges a plurality of column lines each to a predetermined level, and the IC terminates the current flow in a plurality of phase change elements independently for each column.
9. The system of claim 6 wherein the voltage source pre-charges a plurality of column lines to multiple independent levels for each column line, and the IC terminates the current flow in a plurality of phase change elements independently for each column.
10. The system of claim 6 wherein the IC includes a column system decoder for controlling the current flow to the corresponding selected phase change element.
11. The system of claim 6 wherein the IC includes row system element for controlling the current flow in the phase change element with the row (word line) once the column (bit line) has been pre-charged to write data to the PCRAM cell.
12. The system of claim 6 wherein the PCEs each include a variable resistor and an access transistor.
13. The system of claim 6 further including a parasitic element communicating with the array of PCE cells and the parasitic element including a capacitance.
14. The system of claim 13 wherein a plurality of parasitic elements include connection lines connecting the plurality of devices of the array of phase change element cells.
15. The system of claim 6 further including a control element on the IC for managing the voltage source.