Computer system fault detection

1. A computer system comprising:

a core processor;

a sub-system in signal communication with the core processor;

a power supply comprising a first output in power communication with the core processor;

a power switch in signal communication with the power supply, the power switch for controlling a state of the first output;

a service processor in signal communication with the sub-system and the power supply,

wherein the power supply further comprises a second output, the service processor in power communication with the second output, the second output providing continuous power to the service processor even when the system is powered down;

wherein the service processor is responsive to an unexpected operating condition for detecting a fault of at least one of the sub-system and the power supply and generating a signal representative of the fault, the service processor using a reduced power mode for detecting the fault of the second output;

a light emitting diode display in signal communication with the service processor, the light emitting diode display responsive to the signal to display an indication of the fault;

a back up power supply in power connection with the service processor; and

a non-volatile memory in signal communication with the service processor for storing information related to the fault, the non-volatile memory capable of retaining the stored information in the absence of power;

wherein in response to activation of the power switch and a fault of the second output, the service processor uses the back up power supply and the reduced power mode to detect the fault of the second output and generate a signal representative thereof, the signal providing an indication that both the first output and the secondary output have faulted.

2. The system of claim 1 , further comprising:

a diode circuit in power connection with the service processor, the diode circuit comprising a first diode in power connection with the continuous output and a second diode in power connection with the back up power supply.

3. The system of claim 1 , wherein:

the service processor comprises a first input and a second input, the first input receptive of a voltage of the second output and the second input receptive of a voltage of the back up power supply.

4. The system of claim 1 , further comprising:

a clock source in signal communication with the service processor, the clock source capable of generating a high frequency and a low frequency;

wherein the service processor uses the low frequency in conjunction with the reduced power mode for detecting the fault of the second output.

5. The system of claim 1 , wherein the back up power source is a coin cell battery.

6. A method of detecting a fault of a power supply for a computer system, the method comprising:

in response to activation of a power switch, making available to a service processor power from a back up power supply;

comparing a voltage of a continuous power output of the power supply to a voltage of the back up power supply;

in response to the voltage of the back up power supply being greater than the voltage of the continuous power output:

selecting a reduced power mode of the service processor;

obtaining power from the back up power supply;

detecting a fault of the power supply;

generating a signal representative of the detected fault of the power supply;

displaying via a LED display receptive of the generated signal an indication of the detected fault;

writing to a non-volatile memory information related to the fault; and

generating a signal, the signal providing an indication that both a first output of the power supply and the secondary output of the power supply have faulted.