IP Library Granted Patent US 8,416,857
Granted Patent B2
US 8,416,857 · App. 11/693,506 · Granted Apr 9, 2013

Parallel or pipelined macroblock processing

Inventors: James Au (Richmond, CA); Kenn Heinrich (Oshawa, CA)
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Quick Facts
Patent No.
US 8,416,857
App. No.
11/693,506
Granted
Apr 9, 2013
Kind
B2
Abstract

A video processing system. In a specific embodiment, the system implements a system for processing macroblocks that includes a first module for processing a macroblock. A controller provides a first macroblock to the first module and provides a second macroblock to the first module, without waiting for the first module to complete processing of the first macroblock, when information is available to the first module to process the second macroblock. The first module may implement a pipelined processor that is adapted to process macroblocks simultaneously. Alternatively, the first module includes a first engine and a second engine, which may run in parallel as parallel engines. In a more specific embodiment, an entire image frame is treated as a single slice and processed by the system via a pipelined engines or parallel engines.

Claims (37)

1. A system for processing image information into macroblocks, the system comprising:

a first processing engine for generating a first macroblock by using a first data and for generating a next macroblock by using next data;

a second processing engine for generating a second macroblock by using a second data and the first macroblock to predict values for the second macroblock, wherein generation of the second macroblock is concurrent, at least in part, with the first processing engine's generating the next macroblock; and

a demultiplexer to dispatch the first macroblock to the first processing engine and the second macroblock to the second processing engine, wherein the first macroblock and the second macroblock are dispatched on successive clock ticks and wherein the processing of the second macroblock is selectively offset to meet the processing dependency of the second macroblock;

wherein clocks of the first processing engine, the second processing engine and the demultiplexer and synchronized for each frame using a synchronization tick, wherein subsequent clock ticks coincide with dispatching of the macroblocks.

2. The system of claim 1 , wherein the first macroblock and the second macroblock are within a slice of an image frame.

3. The system of claim 1 , wherein the first processing engine and the second processing engine comprise at least one stage in a pipelined processor.

4. A method for processing image information into macroblocks the method comprising:

using a first processing engine to generate a first macroblock by using a first data;

generating a next macroblock by using the first processing engine while concurrently using a second processing engine to generate a second macroblock by using a second data and the first macroblock, wherein using the first macroblock comprises using the first macroblock to make predictions for values within the second macroblock and

processing the next macroblock dispatched for processing on successive clock ticks and wherein the processing of the next macroblock is selectively offset to meet the processing dependency of the next macroblock;

wherein clocks of the first processing engine, the second processing engine and a demultiplexer and synchronized for each frame using a synchronization tick, wherein subsequent clock ticks coincide with dispatching of the macroblocks.

5. The method of claim 4 , wherein the first macroblock and the second macroblock are within a slice of an image frame.

6. The method of claim 5 , wherein the slice includes a first row of macroblocks and a second row of macroblocks, wherein the first macroblock is from the first row, and wherein the second macroblock is from the second row.

7. The method of claim 5 , wherein the slice includes a first row pair of macroblocks and a second row pair of macroblocks, wherein the first macroblock is from the first row pair, and wherein the second macroblock is from the second row pair.

8. The method of claim 4 , further comprising: providing at least a portion of the first macroblock to the second processing engine while the first processing engine is processing image information into a third macroblock.

9. The method of claim 4 , further comprising intra prediction for a macroblock.

10. A method comprising:

processing, by first processing engine, a first band of macroblocks in a slice within an image frame;

processing, by second processing engine, a second band of macroblocks in the slice, before the first band of macroblocks is completely processed, when certain macroblocks from the first band of macroblocks have been processed, the processed macroblocks from the first band being used to make predictions for pixels in the second band of macroblocks in the slice and

wherein the processed macroblocks from the first band of macroblocks and the second band of macroblocks are dispatched for processing on successive clock ticks, and wherein the processing of the macroblocks from the second band of macroblock is selectively offset to meet the processing dependency of the second band of macroblocks;

wherein clocks of the first processing engine, the second processing engine and a demultiplexer and synchronized for each frame using a synchronization tick, wherein subsequent clock ticks coincide with dispatching of the macroblocks.

11. The method of claim 10 , wherein the certain macroblocks are determined based on at least one criterion.

12. The method of claim 11 , wherein the at least one criterion comprises: an availability of a processed macroblock directly above the second macroblock in the first band of macroblocks.

13. The method of claim 12 , wherein the at least one criterion comprises: an availability of a macroblock diagonally adjacent above and left of the second macroblock and a macroblock diagonally adjacent above and to the right of the second macroblock.

14. The method of claim 10 , wherein the first row of macroblocks and the second row of macroblocks includes: at least one row pair of macroblocks.

15. The method of claim 10 , wherein processing comprises: performing intra prediction on at least one macroblock.

16. The method of claim 15 , wherein performing comprises: computing at least one motion search vector for a macroblock.

17. A non-transitory computer-readable medium having a set of instructions which when executed performs a method comprising:

processing, by first processing engine, a first row of macroblocks;

providing first processed information in response to processing the first row of macroblocks, the processed information being used to make predications for a second row of macroblocks;

processing, by second processing engine, the second row of macroblocks based on an availability of the first portion of the first row of macroblocks; and

providing second processed information in response to processing the second row of macroblocks;

wherein the macroblocks from the first row and the second row are dispatched for processing on successive clock ticks and wherein the processing of the macroblocks from the second row is selectively offset to meet the processing dependency of the second macroblock;

wherein clocks of the first processing engine, the second processing engine and a demultiplexer and synchronized for each frame using a synchronization tick, wherein subsequent clock ticks coincide with dispatching of the macroblocks.

18. The non-transitory computer-readable medium of claim 17 , wherein the processing comprises a pipelined processor.

19. The non-transitory computer-readable medium of claim 17 , wherein the processing comprises at least one parallel engine.

Assignments (6)
CHANGE OF NAME Recorded Nov 19, 2014
From: SCIENTIFIC-ATLANTA, INC.
To: SCIENTIFIC-ATLANTA, LLC
Reel/Frame 034299/0440 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 19, 2014
From: SCIENTIFIC-ATLANTA, LLC
To: CISCO TECHNOLOGY, INC.
Reel/Frame 034300/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 27, 2014
From: SCIENTIFIC-ATLANTA, LLC
To: CISCO TECHNOLOGY, INC.
Reel/Frame 034045/0342 →
CHANGE OF NAME Recorded Oct 27, 2014
From: SCIENTIFIC-ATLANTA, INC.
To: SCIENTIFIC-ATLANTA, LLC
Reel/Frame 034067/0220 →
CHANGE OF NAME Recorded Jul 27, 2009
From: SCIENTIFIC-ATLANTA, INC.
To: SCIENTIFIC-ATLANTA, LLC
Reel/Frame 023012/0703 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 20, 2007
From: AU, JAMES; HEINRICH, KENN
To: SCIENTIFIC ATLANTA, INC.
Reel/Frame 019855/0338 →
Continuity (1)
Related Publication 20080240254A1 · Oct 2, 2008