Data burst scheduling
View Patent ↗Methods and apparatus for scheduling transfer of data bursts in a network comprising electronic edge nodes interconnected by bufferless core nodes are disclosed. Each edge node comprises a source node and a sink node, and each core node comprises several bufferless space switches operating in parallel. Each space switch has a master controller and one of the master controllers in a core node functions as a core-node controller. Each master controller has a burst scheduler for computing a schedule for transfer of data bursts, received from source nodes, to respective destination sink nodes. A core-node controller receives requests for bitrate allocations from source nodes and assigns each request to one of the master controllers of the core node. In one embodiment, a scheduler determines schedules for concatenated reconfiguration periods. In another embodiment, parallel schedulers determine schedules for overlapping reconfiguration periods.
1. A method for switching data bursts with a bufferless space switch having a plurality of burst-mode input ports and a plurality of output ports, comprising:
determining a schedule for switching data bursts, over a designated schedule period T, from said plurality of burst-mode input ports to said plurality of output ports;
repetitively employing said schedule for switching data bursts during m consecutive periods, m being an integer greater than zero and each of said consecutive periods is equal to said designated schedule period; and
setting m to exceed a ratio of a time interval required to compute said schedule and said designated schedule period T.
2. The method of claim 1 further comprising computing said schedule once every m consecutive schedule periods.
3. The method of claim 2 further comprising generating said schedule for a succession of bursts generated over a period equal to said designated schedule period T.
4. The method of claim 3 including the further step of generating said succession of bursts according to bitrate allocations for burst streams to be switched from a burst-mode input port to an output port.
5. The method of claim 4 including the further step of refreshing said bitrate allocations periodically every m×T interval.
6. A method for switching data bursts with a bufferless space switch having a plurality of burst-mode input ports and a plurality of output ports, comprising:
selecting a scheduling interval T;
determining a schedule for switching data bursts generated during each of successive time intervals, each time interval having a duration equal to said scheduling interval T, from said plurality of burst-mode input ports to said plurality of output ports, by:
setting the computation period for each of said successive time intervals to an integer multiple m of said scheduling interval T;
computing m successive schedules concurrently, m>1; and
switching data bursts in accordance with each of said m successive schedules.
7. The method of claim 6 further comprising setting the value of m to exceed a ratio of computational time of said schedule to said scheduling interval T.
8. The method of claim 7 including the further step of operating at least m scheduling devices concurrently.
9. The method of claim 8 including the further steps of computing said schedule for burst descriptors generated according to bitrate allocations for each pair of burst-mode input port and output port, and refreshing the bitrate allocations at every interval T.
10. A core node in a burst-switching network, the core node comprising:
a plurality of space switches, each space switch having burst-mode input ports and channel-mode input ports; and
a master controller coupled to said each space switch for:
generating burst descriptors;
scheduling switching times of bursts corresponding to said burst descriptors; and
distributing burst-transfer permits to respective edge nodes, from among a plurality of edge nodes, each burst-transfer permit indicating a time instant for transfer of a burst from a respective edge node;
wherein each burst-mode input port switches individual data bursts to respective output ports, and each channel-mode input port has a switched channel connection carrying a succession of data units of any format to a single output port.
11. The core node of claim 10 wherein the burst connections are allocated equitably among the space switches.