Semiconductor device manufacturing method including three gate insulating films
After protective insulating films are formed on first to third active regions, the protective insulating films formed on the first and third active regions are removed. Subsequently, an insulating film to be a first gate insulating film is formed on each of the first and third active regions, and then, the protective insulating film formed on the second active region is removed. Next, an insulating film to be a second gate insulating film is formed on the second active region, and then, the insulating film to be the first gate insulating film formed on the third active region is removed. Finally, an insulating film to be a third gate insulating film is formed on the third active region.
1. A method for manufacturing a semiconductor device which includes: a first active region, a second active region, and a third active region which are formed in a semiconductor substrate and are separated from one another by element isolation regions; a first gate electrode formed on the first active region with a first gate insulating film interposed; a second gate electrode formed on the second active region with a second gate insulating film thinner than the first gate insulating film interposed; and a third gate electrode formed on the third active region with a third gate insulating film thinner than the second gate insulating film interposed, the method comprising:
a step (a) of forming protective insulating films on the first active region, the second active region, and the third active region;
a step (b) of removing the protective insulating films formed on the first active region and the third active region;
a step (c) of forming, after the step (b), an insulating film to be the first gate insulating film on each of the first active region and the third active region;
a step (d) of removing, after the step (c), the protective insulating film formed on the second active region;
a step (e) of forming, after the step (d), an insulating film to be the second gate insulating film on the second active region;
a step (f) of removing, after the step (e), the insulating film to be the first gate insulating film formed on the third active region; and
a step (g) of forming, after the step (f), an insulating film to be the third gate insulating film on the third active region.
2. The semiconductor device manufacturing method of claim 1 ,
wherein the element isolation regions are trench isolation regions.
3. The semiconductor device manufacturing method of claim 1 ,
wherein the step (b) includes a step of removing the protective insulating films formed on the first active region and the third active region by wet etching using a resist pattern that covers the second active region as a mask.
4. The semiconductor device manufacturing method of claim 1 ,
wherein the step (d) includes a step of removing the protective insulating film formed on the second active region by wet etching using a resist pattern that covers the first active region and the third active region as a mask.
5. The semiconductor device manufacturing method of claim 1 ,
wherein the step (f) includes a step of removing the insulating film to be the first gate insulating film formed on the third active region by wet etching using a resist pattern that covers the first active region and the second active region as a mask.
6. The semiconductor device manufacturing method of claim 1 , further comprising:
a step (h) of subjecting, between the step (a) and the step (b), the second active region to ion implantation for channel formation.
7. The semiconductor device manufacturing method of claim 1 , further comprising:
a step (h) of subjecting, between the step (c) and the step (d), the second active region to ion implantation for channel formation.
8. The semiconductor device manufacturing method of claim 7 ,
wherein the step (h) includes a step of subjecting the second active region to ion implantation for channel formation using a resist pattern that covers the first active region and the third active region as a mask, and
the step (d) includes a step of removing the protective insulating film formed on the second active region by wet etching using the resist pattern used in the step (h) as a mask.
9. The semiconductor device manufacturing method of claim 1 , further comprising:
a step (i) of nitriding, between the step (a) and the step (b), at least a surface portion of the protective insulating film formed on the second active region.
10. The semiconductor device manufacturing method of claim 9 ,
wherein the step (b) includes a step of removing the protective insulating films formed on the first active region and the third active region by wet etching using a part nitrided in the step (i) as a mask.
11. The semiconductor device manufacturing method of claim 9 , further comprising:
a step (h) of subjecting, between the step (a) and the step (i), the second active region to ion implantation for channel formation using a resist pattern that covers the first active region and the third active region as a mask,
wherein the step (i) includes a step of nitriding at least the surface portion of the protective insulating film formed on the second active region with the use of the resist pattern used in the step (h) as a mask.
12. The semiconductor device manufacturing method of claim 9 ,
wherein the step (i) includes a step of nitriding at least the surface portion of the protective insulating film formed on the second active region using a resist pattern that covers the first active region and the third active region as a mask, and
the method further comprising a step (h) of subjecting, between the step (i) and the step (b), the second active region to ion implantation for channel formation using the resist pattern used in the step (i) as a mask.