Yield calculation method
A yield of a device including a plurality of memory circuits is calculated. In the calculation, in the case where at least two or more memory circuits out of the plural memory circuits share a fuse used for redundancy repair, the two or more memory circuits sharing the fuse are replaced with one memory circuit having a capacity equal to the total capacity of the two or more memory circuits for calculating the yield of the device.
1 . A yield calculation method for calculating a yield of a device including a plurality of memory circuits,
wherein in a case where a fuse used for redundancy repair is shared by at least two or more memory circuits out of said plurality of memory circuits, said two or more memory circuits sharing said fuse are replaced with one memory circuit having a capacity equal to a total capacity of said two or more memory circuits for calculating said yield of said device.
2 . The yield calculation method of claim 1 ,
wherein various fuse share conditions are used for calculating a yield and a size of said device corresponding to each of said various fuse share conditions, and a yield per unit area of said device corresponding to each of said various fuse share conditions is calculated by dividing said calculated yield of said device by said calculated size of said device, and
one of said various fuse share conditions for maximizing said calculated yield per unit area of said device is selected as a fuse share condition for said device.
3 . The yield calculation method of claim 1 ,
wherein each of said plurality of memory circuits includes a memory cell portion, a peripheral circuit portion and a redundancy repair circuit portion used for repairing a failure caused in said memory cell portion, and
various fuse share conditions including a condition where a fuse used for the redundancy repair is provided to each of said plurality of memory circuits are used for calculating a yield of said device and a fuse total area corresponding to each of said fuse share conditions.
4 . The yield calculation method of claim 3 ,
wherein an effective critical area value of each of said plurality of memory circuits is calculated correspondingly to at least said memory cell portion and said peripheral circuit portion for calculating a yield of said device corresponding to each of various fuse share conditions by using said calculated effective critical area value, and
in calculating said yield of said device, a sum of effective critical area values of said memory cell portions of said at least two or more memory circuits sharing said fuse and a sum of effective area values of said peripheral circuit portions of said at least two or more memory circuits sharing said fuse are calculated, and said at least two or more memory circuits sharing said fuse are replaced with one memory circuit including a memory cell portion corresponding to said calculated sum of said effective critical area values of said memory cell portions and a peripheral circuit portion corresponding to said calculated sum of said effective critical area values of said peripheral circuit portions.
5 . The yield calculation method of claim 4 ,
wherein said effective critical area values of said memory cell portions and said peripheral circuit portions are calculated on the basis of effective critical area values per unit area or per unit capacity previously calculated in regard to respective circuit elements and areas or capacities of said memory cell portions and said peripheral circuit portions.
6 . The yield calculation method of claim 5 ,
wherein said effective critical area values per unit area or per unit capacity calculated in regard to the respective circuit elements are obtained through critical area analysis of a circuit TEG or another product and stored in a database.
7 . The yield calculation method of claim 4 ,
wherein said yield of said device corresponding to each of said various fuse share conditions is calculated by using a planned defect density attained in mass production of said device, and a fuse share condition for said device is determined in consideration of said calculated yield of said device corresponding to each of said various fuse share conditions and influence of fuse share on a size of said device or on an obtained chip number.
8 . The yield calculation method of claim 7 ,
wherein said determined fuse share condition, said effective critical area values per unit area or per unit capacity previously calculated in regard to the respective circuit elements and said planned defect density are used for calculating a yield of said device attained for a given period of time from start of mass production of said device, and profitability is examined and a mass production schedule is determined on the basis of said calculated yield.
9 . The yield calculation method of claim 1 ,
wherein said fuse is an electric fuse.