IP Library Granted Patent US 7,376,928
Granted Patent B2
US 7,376,928 · App. 11/705,448 · Granted May 20, 2008

Basic cell, edge cell, wiring shape, wiring method, and shield wiring structure

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Quick Facts
Patent No.
US 7,376,928
App. No.
11/705,448
Granted
May 20, 2008
Kind
B2
Abstract

A basic cell of the present invention comprises a plurality of wires which constitute a wiring route of 90°, one ends of the plurality of wires being on one of opposite sides, and the other ends of the plurality of wires being on the other one of the opposite sides, wherein: each of the one ends of the plurality of wires is point-symmetric to any of the other ends of the plurality of wires with respect to the center of the area of the basic cell; and routes of the plurality of wires do not cross one another.

Claims (5)

1. A wiring shape, comprising a stepped wiring route at least in a part of a wiring route formed by a diagonal route, the stepped wiring route being formed by vertically-extending wires and horizontally-extending wires wherein the wiring route formed by the diagonal route is formed in one of a plurality of wiring layers and used for shield wiring.

2. The wiring shape of claim 1 , wherein the wiring route formed by the diagonal route is formed in the uppermost layer of a semiconductor device.

3. A wiring shape, comprising a stepped wiring route at least in a part of a wiring route formed by a diagonal route, the stepped wiring route being formed by vertically-extending wires and horizontally-extending wires wherein the wiring route formed by the diagonal route is formed in the uppermost layer of a semiconductor device and used for shield wiring.

4. A wiring structure, comprising a plurality of wires in which a turn-around connection is formed at a route edge portion, wherein each of the plurality of wires is adjacent to a wire of a different route of the plurality of wires, and the plurality of wires are used for shield wiring.

5. The wiring structure of claim 4 , wherein the plurality of wires are formed in the uppermost layer of a semiconductor device.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 27, 2020
From: PANASONIC CORPORATION
To: PANASONIC SEMICONDUCTOR SOLUTIONS CO., LTD.
Reel/Frame 052755/0917 →
CHANGE OF NAME Recorded Mar 18, 2020
From: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
To: PANASONIC CORPORATION
Reel/Frame 052184/0943 →