Multi-stage power amplifier with enhanced efficiency
A multi-stage RF/Microwave power amplifier circuit is provided that is capable of operating efficiently at multiple output power levels. The amplifier comprises first and second amplifying stages, an output impedance matching network connected to the output of first amplifying stage and an interstage impedance matching network connected between the outputs of said first and second amplifying stages. In a high power mode, the first amplifying stage is enabled and the second amplifying stage is disabled and the output and interstage impedance matching networks present a first value of the output impedance that improves the efficiency of the first amplifying stage. In a low power mode, the first amplifying stage is disabled and the second amplifying stage is enabled, and output and interstage impedance matching networks present a second value of the output impedance that improves the efficiency of the second amplifying stage.
1. A power amplifier comprising:
a first amplifier stage;
an output impedance matching network connecting an output of the first amplifier stage to an output of the power amplifier;
a second amplifier stage;
a first interstage impedance matching network connecting an output of the second amplifier stage to the output of the first amplifier stage; and
a first interstage switch connected in series with the first interstage impedance matching network and located between the output of the first amplifier stage and the first interstage impedance matching network,
wherein the output impedance matching network optimizes power transfer from the output of the first amplifier stage to the output of the power amplifier and the first interstage impedance matching network in series with the output impedance matching network optimizes power transfer from the output of the second amplifier stage to the output of the power amplifier.
2. The power amplifier of claim 1 wherein the first interstage impedance matching network comprises:
an inductor connected in series between the first and second amplifier stage; and
a shunt capacitor connected between the output of the second amplifier stage and a ground.
3. The power amplifier of claim 1 further comprising:
a third amplifier stage; and
a second interstage impedance matching network connecting an output of the third amplifier stage with the output of the second amplifier stage,
wherein the second interstage impedance matching network in series with the first interstage impedance matching network in series with the output impedance matching network optimizes power transfer from the output of the third amplifier stage to the output of the power amplifier.
4. The power amplifier of claim 3 further comprising a second interstage switch connected in series with the second interstage impedance matching network and located between second interstage impedance matching network and the output of the second amplifier stage.
5. A power amplifier for providing an amplified signal to a load comprising:
a high power amplifying stage for amplifying an input signal and generating an amplified signal at an output of the high power amplifier stage;
a first inductor connected in series between the output of the high power amplifier stage and the load;
a first capacitor connected between the first inductor and a ground;
a low power amplifying stage for amplifying an input signal and generating a second amplified signal at an output of the low power amplifier stage
a second inductor connected in series between the output of the low power amplifier stage and the output of the high power amplifier stage;
a second capacitor connected between the output of the low power amplifier stage and the ground; and
an RF switch connected in series with the second inductor and located between the output of the high power amplifier stage and the second inductor.
6. The power amplifier of claim 5 wherein the first inductor, first capacitor, second inductor, and second capacitor are selected to match an impedance of the load with an impedance of the low power amplifying stage.
7. The power amplifier of claim 6 wherein the first inductor, first capacitor, second inductor, and second capacitor are selected to match the load impedance with an impedance of the high power amplifying stage.
8. The power amplifier of claim 5 wherein the first and second amplifying stages are selectively enabled.
9. The power amplifier of claim 5 wherein the first inductor and first capacitor are selected to match an impedance of the load with an impedance of the high power amplifying stage.
10. The power amplifier of claim 5 operable to amplify in the radio frequency (RF)/microwave ranges.
11. The power amplifier of claim 5 operable in a cellular telephone.
12. A power amplifier comprising:
a first amplifier stage;
an output impedance matching network connecting an output of the first amplifier stage to an output of the power amplifier;
a second amplifier stage;
a first interstage impedance matching network connecting an output of the second amplifier stage to the output of the first amplifier stage;
a first interstage switch connected in series with the first interstage impedance matching network and located between the output of the first amplifier stage and the first interstage impedance matching network,
a third amplifier stage;
a second interstage impedance matching network connecting an output of the third amplifier stage to the output of the second amplifier stage; and
a second interstage switch connected in series with the second interstage impedance matching network and located between the output of the second amplifier stage and the second interstage impedance matching network,
wherein the output impedance matching network optimizes power transfer from the output of the first amplifier stage to the output of the power amplifier, the first interstage impedance matching network in series with the output impedance matching network optimizes power transfer from the output of the second amplifier stage to the output of the power amplifier, and the second interstage impedance matching network in series with the first interstage impedance matching network in series with the output impedance matching network optimizes power transfer from the output of the third amplifier stage to the output of the power amplifier.
13. The power amplifier of claim 12 operable to amplify in the radio frequency (RF)/microwave ranges.
14. The power amplifier of claim 12 operable in a cellular telephone.
15. The power amplifier of claim 1 operable to amplify in the radio frequency (RF)/microwave ranges.
16. The power amplifier of claim 1 operable in a cellular telephone.