IP Library Granted Patent US 7,535,046
Granted Patent B2
US 7,535,046 · App. 11/708,033 · Granted May 19, 2009

Dielectric memory and manufacturing method thereof

Assignee: Panasonic Corporation
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Quick Facts
Patent No.
US 7,535,046
App. No.
11/708,033
Granted
May 19, 2009
Kind
B2
Abstract

As an oxygen diffusion prevention layer, a multilayer film formed by a metal nitride and a noble metal element. As an interlayer insulation film on the oxygen diffusion prevention layer, a plasma CVD oxide film is used. Moreover, as an interlayer insulation film on a capacitor, an ozone TEOS film is used.

Claims (25)

1. A dielectric memory comprising:

an interlayer insulation film on a semiconductor substrate;

a contact plug in the interlayer insulation film;

an oxygen diffusion prevention layer on an upper surface of the contact plug;

a first ozone TEOS film on the interlayer insulation film, the first ozone TEOS film covering the oxygen diffusion prevention layer;

a plasma CVD oxide film on the first ozone TEOS film;

a capacitor formed in an opening which penetrates through the first ozone TEOS film and the plasma CVD oxide film and reaches an upper surface of the oxygen diffusion prevention layer, the capacitor including a bottom electrode, a dielectric film, and a top electrode; and

an insulation film on the plasma CVD oxide film, the insulation film covering the capacitor.

2. A dielectric memory of claim 1 , wherein the insulation film is a second ozone TEOS film.

3. A dielectric memory of claim 2 , wherein each of the first ozone TEOS film and the second ozone TEOS film have a film thickness of 50 nm to 600 nm.

4. A dielectric memory of claim 1 , wherein the oxygen diffusion prevention layer contains a noble metal oxide.

5. A manufacturing method of a dielectric memory comprising the steps of:

forming an interlayer insulation film on a substrate;

forming a contact plug in the interlayer insulation film to contact the substrate;

forming an oxygen diffusion prevention layer on the interlayer insulation film to contact the contact plug;

forming a first insulation film on the oxygen diffusion prevention layer such that hydrogen is not produced in a formation process;

forming a plasma CVD oxide film on the first insulation film;

forming an opening to penetrate through the first insulation film and The plasma CVD oxide film and to reach an upper surface of the oxygen diffusion prevention layer;

forming a capacitor including a bottom electrode, a dielectric film, and a top electrode along the opening; and

forming a second insulation film on the plasma CVD oxide film such that hydrogen is not produced in a formation process to cover the capacitor.

6. A manufacturing method of claim 5 , wherein the first insulation film is an ozone TEOS film.

7. A manufacturing method of claim 6 , wherein the first insulation film has a film thickness of 50 nm to 600 nm.

8. A manufacturing method of claim 5 , wherein the second insulation film is an ozone TEOS film.

9. A manufacturing method of claim 8 , wherein the second insulation film has a film thickness of 50 nm to 600 nm.

10. A manufacturing method of claim 5 , wherein the oxygen diffusion prevention layer contains a noble metal oxide.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 7, 2015
From: PANASONIC CORPORATION
To: PANNOVA SEMIC, LLC
Reel/Frame 036065/0273 →
CHANGE OF NAME Recorded Nov 21, 2008
From: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
To: PANASONIC CORPORATION
Reel/Frame 021897/0588 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 5, 2007
From: NATSUME, SHINYA
To: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
Reel/Frame 019784/0668 →
Priority Claims (1)
JP 2006-158308 · Jun 7, 2006 · national
Continuity (1)
Related Publication 20070284642A1 · Dec 13, 2007