Method of manufacturing semiconductor device
View Patent ↗A dummy oxide film having a film thickness that is the same as that of a gate oxide film of a high voltage transistor is formed on a gate electrode of a transistor, and the dummy oxide film and the gate oxide film formed on a substrate surface are removed at the same time during etching for spacer formation. Thus, it becomes possible to stably form a spacer width that sufficiently satisfies device characteristics when manufacturing a semiconductor device where a low voltage transistor and a high voltage transistor are formed on the same semiconductor substrate.
1. A method of manufacturing a semiconductor device comprising:
forming first and second active regions on a semiconductor substrate surface;
forming a first gate insulation film having a first thickness on the first active region;
forming a second gate insulation film having a second thickness on the second active region;
forming gate electrode material on the first and second gate insulation films;
forming hard mask material having the first thickness on the gate electrode material;
patterning the hard mask material to cause a first hard mask pattern to remain on the gate electrode material positioned on the first active region and to cause a second hard mask pattern to remain on the gate electrode material position on the second active region;
patterning the gate electrode material using the first and second hard mask patterns as a mask to form a first gate electrode on the first active region and to form a second gate electrode on the second active region;
forming a first insulation film on the first and second active regions;
forming a second insulation film on the first insulation film;
etching the second insulation film to form a first side wall spacer on side walls of the first and second gate electrodes;
removing the first side wall spacer formed on the side wall of the second gate electrode;
etching the first insulation film to expose the first and second hard mask patterns, form a second side wall spacer comprising the first and second insulation films on the side wall of the first gate electrode, and form a third side wall spacer comprising the first insulation film on the side wall of the second gate electrode;
etching and removing the first and second hard mask patterns and the first and second gate insulation films simultaneously; and
forming a metal film on the surfaces of the first and second gate electrode and on the surfaces of the first and second active regions.
2. The semiconductor device manufacturing method of claim 1 , wherein the first thickness of the hard mask material is set to a thickness where the first and second hard mask patterns and the first gate insulation film are etched and removed at the same time.
3. The semiconductor device manufacturing method of claim 1 , wherein the first thickness of the first gate insulation film is thicker than the second thickness of the second gate insulation film.
4. The semiconductor device manufacturing method of claim 1 , wherein the first gate electrode is a gate electrode of a high voltage transistor that operates at a relatively high operating voltage, and the second gate electrode is a gate electrode of a low voltage transistor that operates at a relatively low operating voltage.