Method for fabricating a semiconductor package
View Patent ↗A method for fabricating an IC package that includes depositing conductive adhesive bodies on the leads, and then adhering the electrodes of an IC device to the so disposed conductive adhesive bodies.
1. A method for fabricating a semiconductor package, comprising:
disposing a passivation body over a plurality of electrodes of an IC semiconductor device;
removing a portion of said passivation body to define an opening over each of the plurality of electrodes of said IC semiconductor device;
depositing a conductive adhesive body on a plurality of conductive leads;
aligning each said opening with a respective adhesive body;
placing said IC semiconductor device over said conductive adhesive bodies with each said opening in alignment with said respective adhesive body; and
adhering each adhesive body to a respective electrode of the plurality of electrodes of said IC semiconductor device.
2. The method of claim 1 , wherein said IC semiconductor device includes a plurality of edges, and wherein said plurality of electrodes is disposed over at least each edge of said plurality of edges.
3. The method of claim 1 , wherein said passivation body comprises an epoxy.
4. The method of claim 1 , wherein said passivation body includes solder resist characteristics.
5. The method of claim 1 , wherein said conductive adhesive bodies are comprised of solder, and are adhered to said plurality of electrodes in a reflow step.
6. The method of claim 1 , wherein said conductive adhesive bodies are comprised of a conductive polymer, and are adhered to said plurality of electrodes in a curing step.
7. The method of claim 1 , wherein said leads comprise a lead frame.
8. The method of claim 1 , wherein said leads are included in a laminate substrate.
9. The method of claim 1 , wherein said leads are arranged at least on a bottom surface of said IC semiconductor device.
10. The method of claim 1 , further comprising molding over said IC semiconductor device and at least portions of said leads with a mold compound.
11. A method for fabricating a semiconductor package, comprising:
forming a passivation body having a plurality of openings lining up over each electrode of an IC semiconductor device;
depositing a conductive adhesive body on a plurality of conductive leads;
aligning each said plurality of openings with a respective adhesive body;
placing said IC semiconductor device over said conductive adhesive bodies with each said plurality of openings in alignment with said respective adhesive body; and
adhering each adhesive body to a respective electrode of said IC semiconductor device.
12. The method or claim 11 , wherein said IC semiconductor device includes said electrodes at an edge thereof or underneath a bottom surface of said device.
13. The method of claim 11 , wherein said passivation body comprises an epoxy.
14. The method of claim 13 , wherein said passivation body includes solder resist characteristics.
15. The method of claim 11 , wherein said conductive adhesive bodies are comprised of solder, and are adhered to said electrodes in a reflow step.
16. The method of claim 11 , wherein said conductive adhesive bodies are comprised of a conductive polymer, and are adhered to said electrodes in a curing step.
17. The method of claim 11 , wherein said leads comprise a lead frame.
18. The method of claim 11 , wherein said leads are included in a laminate or ceramic substrate.
19. The method of claim 11 , wherein said leads are arranged to surround said IC semiconductor device.
20. The method of claim 11 , further comprising molding over said IC semiconductor device and at least portions of said leads with a mold compound.
21. The method of claim 11 , wherein said passivation body is drop-on-demand deposited whereby said plurality of openings are defined during the deposition of said passivation body.