Low power voltage reference circuit
View Patent ↗An embodiment of the present invention is directed to a low power voltage reference circuit. The circuit includes a first circuit for generating a PTAT voltage without using an operational amplifier. The circuit also includes a second circuit for generating the reference voltage. The first and the second circuit do not utilize a resistor.
1. A circuit for generating a reference voltage, said circuit comprising:
a current reference circuit comprising a PTAT generator, wherein the PTAT generator is configured to generate a PTAT voltage and a bias voltage;
a first transistor coupled with a first output of the current reference circuit, wherein said first transistor is operable to generate a bias current that is proportional to a reference current of said current reference circuit, wherein said reference current is proportional to a temperature measurement;
a diode-connected transistor coupled with said first transistor, wherein the diode-connected transistor is sized to compensate for a temperature-based voltage variation;
a second transistor coupled with said diode-connected transistor, wherein said reference voltage is generated at a drain of said diode-connected transistor, and wherein a negative temperature variation of the second transistor is at least partially cancelled by a positive temperature coefficient of the diode-connected transistor; and
a voltage follower circuit configured to generate a bandgap reference voltage based on said reference voltage, wherein a transistor of the voltage follower circuit is biased by the bias voltage of the PTAT generator.
2. The circuit as recited in claim 1 , wherein said current reference circuit further comprises:
a current mirror coupled with said first transistor and with said
PTAT generator, wherein said PTAT generator is configured to generate the PTAT voltage without use of an operational amplifier;
a voltage to current converter coupled with said PTAT generator and operable to convert said PTAT voltage to a PTAT current; and
a bias circuit coupled with said current mirror and said voltage to current converter, wherein said bias circuit is operable to bias said voltage to current converter.
3. The circuit as recited in claim 1 wherein a variation of said bandgap reference voltage across a wafer is substantially 1.24V±20 mV.
4. The circuit as recited in claim 1 having an operating current less than 100 nA.
5. A voltage reference circuit comprising:
a current reference circuit comprising a PTAT generator, wherein the PTAT generator is configured to generate a PTAT voltage and a bias voltage
a PMOS transistor coupled with an output of a current reference circuit, wherein said current reference circuit is configured to generate a reference current that is proportional to a temperature measurement; and
a diode-connected transistor coupled with said PMOS transistor, wherein the diode-connected transistor is sized to compensate for a temperature-based voltage variation of the voltage reference circuit, and wherein a voltage reference is generated at a drain of said diode-connected transistor, and wherein the current reference circuit and the voltage reference circuit are resistor free;
a second transistor coupled with said diode-connected transistor, wherein a negative temperature variation of the second transistor is at least partially cancelled by a positive temperature coefficient of the diode-connected transistor; and
a voltage follower circuit configured to generate a bandgap reference voltage based on said reference voltage, wherein a transistor of the voltage follower circuit is biased by the bias voltage of the PTAT generator.
6. The voltage reference circuit as recited in claim 5 , wherein said current reference circuit further comprises:
a current mirror coupled with said PMOS transistor and with said
PTAT generator, wherein said PTAT generator is operable to generate a PTAT voltage without use of an operational amplifier;
a voltage to current converter coupled with said PTAT generator and operable to convert said PTAT voltage to a PTAT current; and
a bias circuit coupled with said current mirror and said voltage to current converter, wherein said bias circuit is operable to bias said voltage to current converter.
7. The voltage reference circuit as recited in claim 5 having an operating current less than 300 nA.
8. The voltage reference circuit as recited in claim 5 wherein said voltage reference circuit is coupled with an external voltage source that is equal to or less than Vt+300 m V, wherein Vt is a threshold voltage of one of said PMOS transistor or a NMOS transistor.
9. The voltage reference circuit as recited in claim 5 having a temperature coefficient of less than 200 ppm/° C.
10. The voltage reference circuit as recited in claim 5 wherein said voltage reference is independent of temperature.
11. The voltage reference circuit as recited in claim 5 wherein said voltage reference is independent of an external voltage supplied to the voltage reference circuit.