IP Library Granted Patent US 7,955,961
Granted Patent B2
US 7,955,961 · App. 11/715,225 · Granted Jun 7, 2011

Process for manufacture of trench Schottky

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Quick Facts
Patent No.
US 7,955,961
App. No.
11/715,225
Granted
Jun 7, 2011
Kind
B2
Abstract

A trench-type Schottky semiconductor device and a method for fabricating the trench-type Schottky semiconductor device are disclosed. The method includes the steps of forming an epitaxial (EPI) layer atop a silicon substrate, forming a nitride layer atop the EPI layer, patterning a plurality of windows in the nitride layer into an active region and a termination region, forming a plurality of trenches in the active and termination regions such that the plurality of trenches in the termination regions are spaced apart from each other so as to form a plurality of mesas, lining the first type of trenches with a gate oxide layer, and converting the mesas to oxide mesas; and then applying a barrier layer metal to the mesas in the device active area and in the termination trenches.

Claims (34)

1. A method, comprising the steps of:

forming a plurality of spaced semiconductor mesas to define a plurality of spaced termination trenches;

lining the plurality of spaced termination trenches with an oxide layer;

oxidizing the plurality of mesas to obtain a plurality of fully oxidized mesas; and

filling the plurality of spaced termination trenches with a barrier metal to form a trench-type Schottky semiconductor device.

2. The method of claim 1 , further comprising placing a buffer atop the metal barrier.

3. The method of claim 2 , wherein the buffer comprises TiN or TiW, and the barrier metal comprises Pd—Mo.

4. The method of claim 2 , further comprising:

forming a contact metal comprising Al on an exposed surface of the buffer.

5. The method of claim 4 , further comprising etching at least parts of the barrier metal so as to separate at least parts of active and termination regions from each other.

6. The method of claim 4 , wherein each of the plurality of spaced termination trenches has side and bottom walls.

7. The method of claim 1 , further comprising filling the plurality of spaced termination trenches with a conductive polysilicon.

8. The method of claim 7 , further comprising doping the polysilicon to a P type.

9. The method of claim 7 , further comprising converting at least part of the polysilicon to oxide.

10. The method of claim 9 , further comprising placing a layer comprising a barrier metal, a buffer, and a contact metal atop a silicide layer in contact with at least part of the oxide.

11. The method of claim 10 , further comprising:

etching at least parts of each of the barrier metal, the buffer, and the contact metal so as to separate at least parts of the active and termination regions from each other.

12. The method of claim 1 , wherein the plurality of spaced termination trenches surrounds an active region.

13. A method, comprising the steps of:

forming one or more semiconductor mesas to define one or more termination trenches;

lining the one or more termination trenches with an oxide layer;

oxidizing the one or more semiconductor mesas to obtain a plurality of fully oxidized mesas; and

filling at least parts of one or more termination trenches with a doped conductive polysilicon to form a trench-type Schottky semiconductor device.

14. The method of claim 13 , further comprising filling the plurality of spaced termination trenches with a barrier metal.

15. The method of claim 14 , further comprising placing a buffer atop the metal barrier.

16. The method of claim 14 , further comprising forming a contact metal comprising Al on an exposed surface of the buffer.

17. A method comprising:

forming one or more semiconductor mesas to define one or more termination trenches;

lining the one or more termination trenches with an oxide layer;

oxidizing the one or more semiconductor mesas to obtain a plurality of fully oxidized mesas;

filling at least parts of one or more termination trenches with an undoped conductive polysilicon layer; and

subsequently doping said undoped conductive polysilicon layer to a P type doped conductive polysilicon to form a trench-type Schottky semiconductor device.

18. The method of claim 17 , further comprising filling the plurality of spaced termination trenches with a barrier metal.

19. The method of claim 18 , further comprising placing a buffer atop the metal barrier.

Assignments (2)
CHANGE OF NAME Recorded Jul 23, 2018
From: INTERNATIONAL RECTIFIER CORPORATION
To: INFINEON TECHNOLOGIES AMERICAS CORP.
Reel/Frame 046612/0968 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 13, 2009
From: RICHIERI, GIOVANNI
To: INTERNATIONAL RECTIFIER CORP.
Reel/Frame 022096/0451 →