IP Library Patent Application 11715437
Patent Application
App. No. 11/715,437

Semiconductor device and fabrication method therefor

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Patent No.
US None
App. No.
11/715,437
Abstract

A semiconductor device has a transistor of a first conductivity type formed on a semiconductor substrate and having a first gate insulating film and a first gate electrode and a transistor of a second conductivity type having a second gate insulating film and a second gate electrode. The first gate electrode is a metal gate electrode having a metal film and the second gate electrode is a fully-silicided gate electrode made of a silicide film.

Claims (29)

1 . A semiconductor device comprising:

a transistor of a first conductivity formed on a semiconductor substrate and having a first gate insulating film and a first gate electrode; and

a transistor of a second conductivity type formed on a different region of the semiconductor substrate from a region thereof on which the transistor of the first conductivity is formed and having a second gate insulating film and a second gate electrode, wherein

the first gate electrode is a metal gate electrode having a metal film and

the second gate electrode is a fully-silicided gate electrode.

2 . The semiconductor device of claim 1 , wherein at least one of the first gate insulating film and the second gate insulating film is made of a high dielectric constant material.

3 . The semiconductor device of claim 2 , wherein the high dielectric constant material contains at least one of silicon, hafnium, zirconium, titanium, tantalum, aluminum, and a rare earth metal.

4 . The semiconductor device of claim 1 , wherein the transistor of the first conductivity type is an n-channel MOS transistor and the transistor of the second conductivity type is a p-channel MOS transistor.

5 . The semiconductor device of claim 4 , wherein the metal film is a single-layer film made of a material selected from the group consisting of Ta, TaN, TaSi, TaSiN, TaAl, TaAlN, TaAlSi, TaAlSiN, TaC, and TaCN or a multilayer film made of at least two materials selected from the group consisting of Ta, TaN, TaSi, TaSiN, TaAl, TaAlN, TaAlSi, TaAlSiN, TaC, and TaCN.

6 . The semiconductor device of claim 5 , wherein the metal gate electrode has a silicide film formed on the metal film.

7 . The semiconductor device of claim 4 , wherein the first gate insulating film has a thickness larger than a thickness of the second gate insulating film.

8 . The semiconductor device of claim 1 , wherein the fully-silicided gate electrode is made of a silicide containing any one of Ni, Pt, and Co.

9 . A method for fabricating a semiconductor device, the method comprising the steps of:

(a) forming a first insulating film on a semiconductor substrate and then forming a metal film on the formed first insulating film;

(b) removing respective portions of the first insulating film and the metal film which are located in a region of the semiconductor substrate to expose an upper surface of the semiconductor substrate;

(c) forming a second insulating film on the exposed portion of the semiconductor substrate;

(d) forming a polysilicon film over the metal film and the second insulating film;

(e) patterning the polysilicon film formed on the metal film and the metal film to form a first gate electrode which is a metal gate electrode and patterning the polysilicon film formed on the second insulating film to form a second gate electrode; and

(f) siliciding the patterned polysilicon film to change the second gate electrode into a fully-silicided gate electrode.

10 . The method of claim 9 , wherein the step (c) includes the sub-steps of:

forming the second insulating film over the exposed portion of the semiconductor substrate and the metal film; and

removing the portion of the second insulating film which is formed on the metal film.

11 . The method of claim 9 , further comprising the step of:

(g) after the step (e) and before the step (f), forming sidewalls on respective side surfaces of the first gate electrode and the second gate electrode.

12 . The method of claim 11 , further comprising the steps of:

(h) after the step (g) and before the step (f), forming source/drain regions of a first conductivity type in respective portions of the semiconductor substrate which are located on both sides of the first gate electrode and forming source/drain regions of a second conductivity type in respective portions of the semiconductor substrate which are located on both sides of the second gate electrode;

(i) after the step (h) and before the step (f), siliciding the source/drain regions of the first conductivity type and the source/drain regions of the second conductivity type;

(j) after the step (d) and before the step (i), forming a third insulating film on the polysilicon film; and

(k) after the step (j) and before the step (f), removing the third insulating film.

Assignments (2)
CHANGE OF NAME Recorded Nov 17, 2008
From: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
To: PANASONIC CORPORATION
Reel/Frame 021845/0991 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 22, 2007
From: YAMAMOTO, KAZUHIKO; FUJIMOTO, HIROMASA; KOTANI, TAKAFUMI
To: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.; INTERUNIVERSITAIR MICRO-ELEKTRONICA CENTRUM VZW
Reel/Frame 019585/0001 →