Sigma-delta modulator capable of compensating a time delay
View Patent ↗A sigma-delta modulator is disclosed. The sigma-delta modulator includes a first integrator, a second integrator, an analog-to-digital converter, a digital-to-analog converter (DAC), and a compensating device. The first integrator receives an input signal for generating a first output signal. The second integrator receives the first output signal for generating a second output signal. The ADC converts the second output signal into a digital modulation signal. The DAC converts the digital modulation signal into an analog feedback signal. The analog feedback signal is transmitted to the first integrator and the second integrator. The compensating device is for compensating the analog feedback signal for a time delay caused by a feedback loop from the ADC through the DAC to the first integrator.
1. A sigma-delta modulator comprising:
a first integrator, for receiving an input signal and generating a first output signal;
a second integrator, for receiving the first output signal and generating a second output signal;
an analog-to-digital converter (ADC), for converting the second output signal into a digital modulation signal;
a digital-to-analog converter (DAC), for converting the digital modulation signal into an analog feedback signal and transmitting the analog feedback signal to the first integrator and the second integrator; and
a compensation device, for generating a compensation signal;
wherein the compensation signal is utilized for compensation the analog feedback signal for a time delay caused by a feedback loop from the ADC through the DAC to the first integrator;
wherein if the time delay is regarded as Td in the z-domain, the compensation signal comprises Td*Z −1 ;
wherein the compensation device comprises a first compensation unit and a second compensation unit, and the first compensation unit is coupled to the second compensation unit;
wherein the first compensation unit is represented by Td in the z-domain.
2. The sigma-delta modulator of claim 1 , wherein the first integrator is a continuous-time integrator.
3. The sigma-delta modulator of claim 1 , wherein the second integrator is a discrete-time integrator.
4. The sigma-delta modulator of claim 1 , wherein the second compensation device is represented by Z −1 in the z-domain.