IP Library Granted Patent US 7,595,209
Granted Patent B1
US 7,595,209 · App. 11/716,233 · Granted Sep 29, 2009

Low stress thin film microshells

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Quick Facts
Patent No.
US 7,595,209
App. No.
11/716,233
Granted
Sep 29, 2009
Kind
B1
Abstract

Multi-layered, planar microshells having low stress for encapsulation of devices such as MEMS and microelectronics. The microshells may include a perforated pre-sealing layer, below which a sacrificial layer is accessed, and a sealing layer to close the perforation in the pre-sealing layer after the sacrificial material is removed. The sealing layer may further include a nonhermetic layer to physically occlude the perforation and a hermetic layer over the nonhermetic occluding layer to seal the perforation. The various layers may be formed employing processes having opposing stresses to tune the residual stress of the multi-layered microshell. In an embodiment, the hermetic layer is a metal which is deposited with a process tuned to impart a tensile stress to lower the residual stress in the microshell below the magnitude of cumulative stress present in sealing layer and pre-sealing layer.

Claims (20)

1. A method of forming a microshell comprising:

forming a non-planar sacrificial layer over a substrate;

forming a pre-sealing layer having a first stress over the sacrificial layer;

planarizing the pre-sealing layer to perforate the pre-sealing layer with a topographic feature of the sacrificial layer;

removing the sacrificial layer to form a chamber around a device under the pre-sealing layer; and

sealing the pre-sealing layer with a material having a stress opposite in sign to the pre-sealing layer to tune the residual stress of the microshell to be tensile.

2. The method of claim 1 , wherein forming the pre-sealing layer further comprises depositing a compressively stressed film over the sacrificial layer.

3. The method of claim 1 , wherein sealing the pre-sealing layer further comprises depositing a tensilely stressed film.

4. The method of claim 1 , wherein sealing the pre-sealing layer further comprises first depositing a compressively stress film and then depositing a tensilely stressed film.

5. The method of claim 1 , wherein forming the sacrificial layer further comprises:

forming a sacrificial material over the substrate;

etching the sacrificial material with a first mask to define an edge of the chamber;

etching the sacrificial material with a second mask to form the topographic feature in the shape of a blade of sacrificial material extending upwards from the substrate and having a positively sloped sidewall profile.

6. The method of claim 5 , wherein the sacrificial material is formed over a structural component of a MEMS.

7. The method of claim 5 , wherein the sacrificial material is formed of the same material as a release layer surrounding the structural component.

8. The method of claim 5 , wherein forming the sacrificial material further comprises depositing the sacrificial material at a temperature below 450° C.

9. The method of claim 5 , wherein forming the sacrificial material further comprises depositing polycrystalline germanium.

10. The method of claim 1 , wherein the sealing of the pre-sealing layer is with a method imparting a magnitude of stress to the sealing material that is higher than the magnitude of the residual tensile stress in the microshell.

11. The method of claim 5 , wherein the etching the sacrificial material with the second mask forms a plurality of blades in the sacrificial layer, the plurality having a spacing between individual blades staggered from a spacing between individual blades in an adjacent row.

12. The method of claim 5 , wherein the blade is formed to an aspect ratio greater than 8:1.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 16, 2010
From: SILICON LABS SC, INC.
To: SILICON LABORATORIES INC.
Reel/Frame 025366/0466 →
CHANGE OF NAME Recorded May 4, 2010
From: SILICON CLOCKS, INC.
To: SILICON LABS SC, INC.
Reel/Frame 024369/0134 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 9, 2007
From: MONADGEMI, PEZHMAN; QUEVY, EMMANUEL P.; HOWE, ROGER T.
To: SILICON CLOCKS, INC.
Reel/Frame 019051/0484 →